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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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L9779WD 数据表(PDF) 50 Page - STMicroelectronics |
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L9779WD 数据表(HTML) 50 Page - STMicroelectronics |
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50 / 170 page  Functional description L9779WD 50/170 DocID027452 Rev 5 6.8.2 MRD scenarios Figure 23. Scenario 1a: Standard on/off MRD driver with NO power latch mode bit PSOFF = 0 Table 18. Main relay driver electrical characteristics Pin Symbol Parameter Test condition Min Typ Max Unit MRD RDS-on Drain –source resistance Iload = 0.4 A; Vbat = 0 & 13.5 V -- 2.4 Ω IOUTlk MRD Output leakage current Vpin = 13.5 V; Vbat = 0 & 13.5 V - - 10 µA VS/R Voltage S/R on/off R = 21 , C = 10 nF; Vbat = 0 & 13.5 V 1 - 10 V/µs Vcl Output clamping voltage Vbat = 0 & 13.5 V 42 - 55 V Imax Output current Design info - 0.6 A IOVC Over current threshold Vbat = 0 & 13.5 V 0.7 - 1.4 A TFILTEROVC Over current filtering time Test by SCAN 5.25 7 8.75 us VB_UV VB threshold for MRD active Vbat = 0 & 13.5 V - - 4.15 V PWclampSP Clamp single pulse ATE test Iload = 0.5 A; single pulse - - 15 mJ PWclampRP Clamp repetitive pulses reliability test Iload = 0.25 A Freq =1 Hz; 1 Mpulse -- 4 mJ |
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