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L9779WD 数据表(PDF) 40 Page - STMicroelectronics |
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L9779WD 数据表(HTML) 40 Page - STMicroelectronics |
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40 / 170 page  Functional description L9779WD 40/170 DocID027452 Rev 5 The non latched information is available for overload and over temperature conditions in VTRACK_DIAG bit. If the VB voltage is lower than regulated VDD5 and higher than 4.15 V the value of VDD5 and VTRK1, 2, could be calculated by the following method: VDPVDD5 = (Rdson ExtNmos) · (IVDD5 + IV3V3) VDPvtrk1 = (RdsonVTRK1) · IVTRK1 VDPvtrk2 = (RdsonVTRK2) · IVTRK2 Figure 16. Graphic representation of the calculation method VDD5 = VB- (VDPVdd5) VTRK 1, 2 = VB- (VDPVtrk1,2) While V3V3 keeps working as expected till VB = 4.15 V Table 13. Voltage regulators external components required Pin Symbol Parameter Min Typ Max Suggested part number VTRK1 CTRK1 External VTRK1 capacitor 100 nF - 1 µF C1005X7R1C104K--0.1 µF C1608X7R1H104K--0.1 µF VTRK2 CVTRK2 External VTRK2 capacitor 100 nF - 1 µF VDD5 CVDD5 External VDD5 capacitor 1 µF - 10 µF C2012X7R1E105K-- 1 µF C1608X7R1C105K-- 1 µF C3216X7R1H105K--1 µF C3225X7R1E106K--10 µF C3225X7R1C106K--10 µF Ext MOS External N-MOS - - - IRFZ24NSTRL; STD20NF06L (testing reference); NTD18N06L; HUF76419D3 |
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