AT89C51RD2 / AT89C51ED2 QualPack

14

Rev. 0 – 2003 July

4.3.4 FLASH Characteristics

4.3.4.1 Cell endurance

Purpose:

To evaluate the ability of memory cell to withstand high number of program/erase cycles without change of

electrical characteristics.

Test Parameters:

Measurements have been done on lot 0R5414.

Test done on 2 cells in a byte :

-

cell near byte select transistor, called bit0 (1

-

cell near Vss contact, called bit 7 (8

Cycling is done for various programming voltages :

- write :

13.5V on BL / 15.6V on select - clear : 13.5V on sense / 15.6V on select

@5ms

14.5V on BL / 16.6V on select @5ms 14.5V on sense / 16.6V on select

15.5V on BL / 17.6V on select

15.5V on sense / 17.6V on select

16.5V on BL / 17.6V on select

16.5V on sense / 17.6V on select

MP044 0R5414 #01

Vsel=Vbl+2.1 Bit 0 (near byte sel)

-2.5

-2

-1.5

-1

-0.5

0

1

10

100

1000

10000

100000

# cycles

13.5V

14.5V

15.5V

16.5V

MP044 0R5414 #01

Vsel=Vbl+2.1 Bit 7 (near Vss)

-2.5

-2

-1.5

-1

-0.5

0

1

10

100

1000

10000

100000

# cycles

13.5V

14.5V

15.5V

16.5V

MP044 0R5414 #01

Vsel=Vsen+2.1 Bit 0 (near byte sel)

2

2.5

3

3.5

4

4.5

5

5.5

6

6.5

7

1

10

100

1000

10000

100000

# cycles

13.5V

14.5V

15.5V

16.5V

MP044 0R5414 #01

Vsel=Vsen+2.1 Bit 7 (near Vss)

2

2.5

3

3.5

4

4.5

5

5.5

6

6.5

7

1

10

100

1000

10000

100000

# cycles

13.5V

14.5V

15.5V

16.5V