MPC875 datasheet(69/84 Pages) FREESCALE

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MPC875/MPC870 Hardware Specifications, Rev. 3.0

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

Freescale Semiconductor

FEC Electrical Characteristics

Figure 65 shows the MII transmit signal timing diagram.

Figure 65. MII Transmit Signal Timing Diagram

15.3 MII Async Inputs Signal Timing (MII_CRS, MII_COL)

Table 33 provides information on the MII async inputs signal timing.

Figure 66 shows the MII asynchronous inputs signal timing diagram.

Figure 66. MII Async Inputs Timing Diagram

M20_R

MII

RMII_TXD[1:0], RMII_TX_EN to RMII_REFCLK setup

—

M21_R

MII

RMII_TXD[1:0], RMII_TX_EN data hold from RMII_REFCLK rising

edge

2—

Table 33. MII Async Inputs Signal Timing

Num

Characteristic

Min

Max

Unit

MII_CRS, MII_COL minimum pulse width

1.5

—

MII_TX_CLK period

Table 32. MII Transmit Signal Timing (continued)

Num

Characteristic

Min

Max

Unit

MII_TX_CLK (input)

MII_TXD[3:0] (outputs)

MII_TX_EN

MII_TX_ER

MII_CRS, MII_COL

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