Not Recommended for New Designs

bq28550-R1

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SLUSAS4A – OCTOBER 2012 – REVISED SEPTEMBER 2014

Protection (continued)

7.5.4 Charge Overcurrent Detector

detects the overcurrent charge state of the battery and the COUT pin transitions to a low level. This prohibits

charging the battery by turning off the external charge control N-channel MOSFET. The bq28550-R1 device

releases from the charge overcurrent detection state on by detecting the connection of a load for a period up to

Table 1. Hardware Control Due to Fault Detection

Fault Condition

DOUT

COUT

Delay

Comment

(typ)

Once OVP occurs for longer than the specified duration (1 s typ), the CHG FET is turned

OFF and bus communication is NOT valid. The system will support power to the load with

Overcharge Voltage

ON

OFF

1 s

current flow through the CHG FET parasitic diode. This can cause the cell to discharge;

Protection

once the cell voltage reaches the overcharge release voltage for the specified duration (8

ms typ), the CHG FET is turned ON and bus communication is valid.

If the cell is being charged with excessive current, the threshold will be based on a

hardware limit measurement of –112 mV typ across the CHG + DSG FET (VM – Vss) for

a duration longer than 12 ms (typ), the CHG FET is turned OFF and bus communication

is not valid. This will prevent further charging of the cell. The setting of the CHG bit in the

Overcurrent

control Status Register is dependent on the OC bit setting in the Charge Fault Register

Protection During

ON

OFF

12 ms

selection. The FET bit in the Control between the charger is removed and cell voltage

Charging

falls below the threshold for greater than 8 ms (typ). COUT is turned back ON. Once the

host MCU takes corrective action OR if the battery charger is removed AND there is a

load detected for a period of 4 ms (typ), the CHG FET is turned ON and bus

communication is valid.

If the cell voltage falls to lower than 2.3 V for a duration of 24 ms (typ), the DSG FET is

Over Discharging

turned OFF, and bus communication is not valid. The system requires if the charger is

OFF

ON

24 ms

Voltage Protection

connected and cell voltage rises above threshold for greater than 4 ms (typ), DOUT is

turned back ON and bus communication is valid.

If the cell is being discharged with excessive current, the threshold will be based on a

hardware limit measurement of 150 mV typ across the DSG + CHG FET (VM – Vss) for a

Overcurrent

duration longer than 12 ms (typ) the DSG FET is turned OFF and bus communication is

Protection During

OFF

ON

12 ms

NOT valid. This will prevent further discharging of the cell, and the DSG bit in the control

Discharging

Status Register will be set. If the drop across the DSG + CHG FET is less than the

threshold OR there is no load detected for a duration of 4 ms (typ), the DSG FET is

turned ON and bus communication is valid.

0.9 V for greater than 400 µs at the VM terminal, and the DSG FET is turned OFF, and

Short-Circuit

OFF

ON

400 µs

bus communication is NOT valid. The DSG bit in the control Status Register will be set.

Protection

The system will turn the DSG FET ON if the voltage at VM is below 150 mV OR no load

is detected.

7.5.5 Gas Gauge Control of Discharge DOUT Pin

Firmware Control of DOUT for Protection

The gas gauge firmware can override the hardware-based protection by forcing DOUT low to turn OFF the

discharge FET. However, the firmware cannot override the hardware protection to force discharge.

There are three conditions that enable firmware to force DOUT low:

1. The HOST_DISCONNECT (DSG FET OFF) subcommand: This feature is useful for the system to disable

the discharge FET from the battery pack if it fails to authenticate.

2. Pack removal detection by the SDA and SCL pins falling low for more than 2 seconds: The DOUT pin

override condition is released upon detection of PACK insertion.

3. Firmware-based undervoltage detection: The DOUT pin is forced low if voltage of the cell falls below the Set

Voltage threshold. The DOUT override condition is released when the voltage is above Clear Voltage.

Any one of the above three conditions will force the DOUT pin low. However, all three corresponding release

conditions must be satisfied before the DOUT override is returned to hardware-based protection control.

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