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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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VT82C596 数据表(PDF) 29 Page - List of Unclassifed Manufacturers |
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VT82C596 数据表(HTML) 29 Page - List of Unclassifed Manufacturers |
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29 / 96 page  VT82C596B Revision 0.3 June 17, 1999 -23- Register Overview 7HFKQRORJLHV ,QF :H &RQQHFW :H &RQQHFW PCI Function 0 Registers - PCI-to-ISA Bridge Configuration Space PCI-to-ISA Bridge Header Registers Offset PCI Configuration Space Header Default Acc 1-0 Vendor ID 1106 RO 3-2 Device ID 0596 RO 5-4 Command 0087 RW 7-6 Status 0200 WC 8 Revision ID nn RO 9 Programming Interface 00 RO A Sub Class Code 01 RO B Base Class Code 06 RO C -reserved- (cache line size) 00 — D -reserved- (latency timer) 00 — E Header Type 80 RO F Built In Self Test (BIST) 00 RO 10-27 -reserved- (base address registers) 00 — 28-2B -reserved- (unassigned) 00 — 2F-2C Subsystem ID Read 00 RO 30-33 -reserved- (expan. ROM base addr) 00 — 34-3B -reserved- (unassigned) 00 — 3C -reserved- (interrupt line) 00 — 3D -reserved- (interrupt pin) 00 — 3E -reserved- (min gnt) 00 — 3F -reserved- (max lat) 00 — Configuration Space PCI-to-ISA Bridge-Specific Registers Offset ISA Bus Control Default Acc 40 ISA Bus Control 00 RW 41 ISA Test Mode 00 RW 42 ISA Clock Control 00 RW 43 ROM Decode Control 00 RW 44 Keyboard Controller Control 00 RW 45 Type F DMA Control 00 RW 46 Miscellaneous Control 1 00 RW 47 Miscellaneous Control 2 00 RW 48 Miscellaneous Control 3 01 RW 49 -reserved- 00 — 4A IDE Interrupt Routing 04 RW 4B -reserved- 00 — 4C DMA / Master Mem Access Control 1 00 RW 4D DMA / Master Mem Access Control 2 00 RW 4F-4E DMA / Master Mem Access Control 3 0300 RW Configuration Space PCI-to-ISA Bridge-Specific Registers Offset Plug and Play Control Default Acc 50 -reserved- (do not program) 24 RW 51-53 -reserved- 00 — 54 PCI IRQ Edge / Level Selection 00 RW 55 PnP Routing for External MIRQ0-1 00 RW 56 PnP Routing for PCI INTB-A 00 RW 57 PnP Routing for PCI INTD-C 00 RW 58 PnP Routing for External MIRQ2 00 RW 59 PIRQ Pin Configuration 04 RW 5A KBC / RTC Control x4† RW 5B Internal RTC Test Mode 00 RW 5C DMA Control 00 RW 5F-5D -reserved- 00 — † Bit 7-4 power-up default value depends on external strapping Offset Distributed DMA Default Acc 61-60 Channel 0 Base Address / Enable 0000 RW 63-62 Channel 1 Base Address / Enable 0000 RW 65-64 Channel 2 Base Address / Enable 0000 RW 67-66 Channel 3 Base Address / Enable 0000 RW 69-68 Serial IRQ Control 0000 RW 6B-6A Channel 5 Base Address / Enable 0000 RW 6D-6C Channel 6 Base Address / Enable 0000 RW 6F-6E Channel 7 Base Address / Enable 0000 RW Offset Miscellaneous Default Acc 70 Subsystem ID Write 00 WO 71-73 -reserved- 00 — 77-74 GPIO / Chip Select Control 0000 0000 RW 7B-78 Programmable Chip Select Control 0000 0000 RW 7F-7C PC/PCI Control 0000 0000 RW 80 Programmable Chip Select Mask 00 RW 81 ISA Positive Decoding Control 1 00 RW 82 ISA Positive Decoding Control 2 00 RW 83 ISA Positive Decoding Control 3 00 RW 84 ISA Positive Decoding Control 4 00 RW 85-86 -reserved- 00 — 87 Test 1 00 RW 88 Test 2 00 RW 89 PLL Control 00 RW 8A-FF -reserved- 00 — |
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