VT82C596 datasheet(73/96 Pages) ETC

73 / 96 page

VT82C596B

Revision 0.3 June 17, 1999

-67-

Function 3 Registers - Power Management and SMBus

7HFKQRORJLHV ,QF

:H &RQQHFW

I/O Offset 02h – SMBus Host Control.............................RW

Reserved

........................................ always reads 0

6Start

........................................ always reads 0

Writing 0 has no effect ...........................default

Start Execution of Command

Writing a 1 to this bit causes the SMBus

controller host interface to initiate execution of

the command programmed in the SMBus Host

Command Register (I/O offset 3).

All

necessary registers should be programmed

prior to writing a 1 to this bit. The Host Busy

bit (SMBus Host Status Register bit-0) can be

used to identify when the SMBus controller

has completed command execution.

Reserved

........................................ always reads 0

4-2

SMBus Command Protocol

000 Quick Read or Write ..............................default

001 Byte Read or Write

010 Byte Data Read or Write

011 Word Data Read or Write

100 Reserved

101 Block Read or Write

110 Reserved

111 Reserved

Kill

Normal host controller operation ...........default

Stop the host transaction currently in progress

Setting this bit to 1 also sets the FAILED

status bit (Host Status bit-4) and asserts the

interrupt selected by the SMB Interrupt Select

bit (Function 3 SMBus Host Configuration

Interrupt Enable

Disable interrupt generation ...................default

Enable

generation

interrupts

the

completion of the current host transaction.

I/O Offset 03h – SMBus Host Command........................ RW

7-0

SMBUS Host Command .......................... default = 0

This field contains the data transmitted in the

command field of the SMBus host transaction.

I/O Offset 04h – SMBus Host Address............................ RW

The contents of this register are transmitted in the address field

of the SMBus host transaction.

7-1

SMBUS Address ....................................... default = 0

This field contains the 7-bit address of the targeted

slave device.

SMBUS Read or Write ............................ default = 0

Execute a WRITE command ................. default

Execute a READ command

I/O Offset 05h – SMBus Host Data 0 .............................. RW

The contents of this register are transmitted in the Data 0 field

of SMBus host transaction writes. On reads, Data 0 bytes are

stored here.

7-0

SMBUS Data 0.......................................... default = 0

For Block Write commands, this field is programmed

with the block transfer count (a value between 1 and

32). Counts of 0 or greater than 32 are undefined.

For Block Read commands, the count received from

the SMBus device is stored here.

I/O Offset 06h – SMBus Host Data 1 .............................. RW

The contents of this register are transmitted in the Data 1 field

of SMBus host transaction writes. On reads, Data 1 bytes are

stored here.

7-0

SMBUS Data 1.......................................... default = 0

I/O Offset 07h – SMBus Block Data ............................... RW

Reads and writes to this register are used to access the 32-byte

block data storage array. An internal index pointer is used to

address the array. It is reset to 0 by reads of the SMBus Host

Control register (I/O Offset 2) and incremented automatically

by each access to this register. The transfer of block data into

(read) or out of (write) this storage array during an SMBus

transaction always starts at index address 0.

7-0

SMBUS Block Data .................................. default = 0

VT82C596 数据表(PDF) 73 Page - List of Unclassifed Manufacturers

VT82C596 数据表(HTML) 73 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

数据表下载

链接网址

VT82C596 数据表(PDF) 73 Page - List of Unclassifed Manufacturers

VT82C596 数据表(HTML) 73 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

数据表 下载

链接网址

数据表下载