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CS8416-CS 数据表(PDF) 22 Page - Cirrus Logic

部件名 CS8416-CS
功能描述  192 kHZ DIGITAL AUDIO INTERFACE RECEIVER
PDF  48 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS8416-CS 数据表(HTML) 22 Page - Cirrus Logic

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CS8416
22
DS578PP2
6.3
General Purpose Outputs
Three General Purpose outputs are provided to allow the equipment designer flexibility in configuring the
CS8416.
Fourteen signals are available to be routed to the GPOs.
GPO pins may be configured to provide the following data:
Notes: 13. Frequency = 25 MHz Max, duty cycle not guaranteed, target duty cycle = 50% @ FS =48kHz.
6.4
Interrupts
The CS8416 has a comprehensive interrupt capa-
bility. The INT pin may be set to be active low, ac-
tive high or active low with no active pull-up
transistor. This last mode is used for active low,
wired-OR hook- ups, with multiple peripherals
connected to the microcontroller interrupt input
pin.
Many conditions can cause an interrupt, as listed in
the interrupt status register descriptions. Each
source may be masked off through mask register
bits. In addition, each source may be set to rising
edge, falling edge, or level sensitive. Combined
with the option of level sensitive or edge sensitive
modes within the microcontroller, many different
configurations are possible, depending on the
needs of the equipment designer.
Function
Code
Definition
TX
0000
AES/SPDIF input selected by TXSEL[2:0]
EMPH
0001
State of EMPH bit in incoming stream. Same polarity as EMPHb bit.
INT
0010
CS8416 interrupt
C
0011
Channel status bit
U
0100
User data bit
RERR
0101
Receiver Error
NVERR
0110
Non-Validity Receiver Error
RCBL
0111
Receiver Channel Status Block
96KHZ
1000
Input FS ≥ 88.1
AUDIO
1001
Non-audio indicator for decoded input stream
VLRCK
1010
Virtual LRCK
GND
1011
Fixed low Level
VDD
1100
VDD fixed high level
HRMCK
1101
FS X 512 (Note 13)
Codes 1110 to 1111 - Reserved
Table 3. GPO Pin Configurations



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