STLED524 datasheet(33/72 Pages) STMICROELECTRONICS

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STLED524

Detailed description

DIR bits can be updated only when scroll is disabled.

BLNK_C[4:0] - blank column register. It defines the number of blank columns during

horizontal direction scroll (left/right). Maximum allowed value is 24. If the value is higher

than 24, 24 blank columns are inserted only. If DISPISIZE = 1, the maximum number of

blank columns is limited to 20.

BLNK_R[2:0] - blank row register. It defines the number of blank rows during vertical

direction scroll (up/down). Maximum allowed value is 5. If the value is higher than 5, 5 blank

rows can be only inserted.

Note:

This register cannot be read.

Scroll step register stores the number of scroll steps already fulfilled.

Table 38. Scroll control register 2

Scroll control 2

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Add = 31h

BLNK_R[2:0]

BLNK_C[4:0]

Default

Table 39. Scroll control register 3

Scroll control 3

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Add = 32h

WAIT[5:0]

Default

Table 40. Wait time during scroll operation

Wait time duration

WAIT[5:0]

[TFRAME][ms]

(1)

When internal clock is used.

12.8

29.9

211

46.9

……

…

N x 4 + 3

(N x 4 + 3) x 2.56/0.6

……

…

252

1075

255

1088

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