ENICSF2811PBKA datasheet(108/172 Pages) TI1

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WAKE INT

(B)

XCLKOUT

(A)

A0-A15

d(WAKE-IDLE)

w(WAKE-INT)

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T – APRIL 2001 – REVISED MAY 2012

www.ti.com

6.16 Low-Power Mode Wakeup Timing

Table 6-12. IDLE Mode Timing Requirements

MIN

NOM

MAX

UNIT

Without input qualifier

2tc(SCO)

tw(WAKE-INT)

Pulse duration, external wake-up signal

cycles

With input qualifier

1tc(SCO) + IQT

(1)

Input Qualification Time (IQT) = [tc(SCO) × 2 × QUALPRD] × 5 + [tc(SCO) × 2 × QUALPRD].

Table 6-13. IDLE Mode Switching Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Delay time, external wake signal to program execution resume(1)

Without input qualifier

8tc(SCO)

•

Wake-up from Flash

cycles

–

Flash module in active state

With input qualifier

8tc(SCO) + IQT

(2)

td(WAKE-IDLE)

Without input qualifier

1050tc(SCO)

•

Wake-up from Flash

cycles

–

Flash module in sleep state

With input qualifier

1050tc(SCO) + IQT

(2)

Without input qualifier

8tc(SCO)

•

Wake-up from SARAM

cycles

With input qualifier

8tc(SCO) + IQT

(2)

(1)

This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. Execution of an ISR (triggered

by the wake-up) signal involves additional latency.

(2)

Input Qualification Time (IQT) = [tc(SCO) × 2 × QUALPRD] × 5 + [tc(SCO) × 2 × QUALPRD].

XCLKOUT = SYSCLKOUT

WAKE INT can be any enabled interrupt, WDINT, XNMI, or XRS.

Figure 6-15. IDLE Entry and Exit Timing

108

Electrical Specifications

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Product Folder Link(s): TMS320F2810 TMS320F2811 TMS320F2812 TMS320C2810 TMS320C2811 TMS320C2812

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