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STM8S005C6 数据表(PDF) 63 Page - STMicroelectronics

部件名 STM8S005C6
功能描述  Extended instruction set
PDF  97 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8S005C6 数据表(HTML) 63 Page - STMicroelectronics

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STM8S005C6 STM8S005K6
Electrical characteristics
84
9.3.6
I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All
unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or
an external pull-up or pull-down resistor.
Table 36. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level
voltage
VDD = 5 V
-0.3
-
0.3 x VDD
V
VIH
Input high level
voltage
0.7 x VDD
-VDD + 0.3 V
V
Vhys
Hysteresis(1)
-700
-
mV
Rpu
Pull-up resistor
VDD = 5 V, VIN = VSS
30
55
80
k
tR, tF
Rise and fall time
(10% - 90%)
Fast I/Os
Load = 50 pF
--
35(2)
ns
Standard and high sink I/Os
Load = 50 pF
-
-
125(2)
ns
Ilkg
Input leakage
current,
analog and digital
VSS VIN VDD
--
±1(3)
µA
Ilkg ana
Analog input
leakage current
VSS VIN VDD
--
±250 (3)
nA
Ilkg(inj)
Leakage current in
adjacent I/O
Injection current ±4 mA
-
-
±1(3)
µA
1.
Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
2.
Data guaranteed by design, not tested in production.
3.
Data based on characterization results, not tested in production.



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