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STM8S005C6 数据表(PDF) 7 Page - STMicroelectronics

部件名 STM8S005C6
功能描述  Extended instruction set
PDF  97 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8S005C6 数据表(HTML) 7 Page - STMicroelectronics

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STM8S005C6 STM8S005K6
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8
List of figures
Figure 1.
STM8S005C6/K6 value line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 2.
Flash memory organisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 3.
LQFP 48-pin pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 4.
LQFP 32-pin pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 5.
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 6.
Supply current measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 7.
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 8.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 9.
fCPUmax versus VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 10.
External capacitor CEXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 11.
Typ. IDD(RUN) vs VDD, HSE user external clock, fCPU = 16 MHz. . . . . . . . . . . . . . . . . . . . . 55
Figure 12.
Typ. IDD(RUN) vs VDD, HSE user external clock, VDD = 5 V . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 13.
Typ. IDD(WFI) vs VDD, HSE user external clock, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . 56
Figure 14.
Typ. IDD(WFI) vs VDD, HSE user external clock, VDD = 5 V . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 15.
Typ. IDD(RUN) vs VDD, HSI RC osc, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 16.
Typ. IDD(WFI) vs VDD, HSI RC osc, fCPU = 16 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 17.
HSE external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 18.
HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 19.
Typical HSI frequency variation vs VDD at 3 temperatures. . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 20.
Typical LSI frequency variation vs VDD @ 25 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 21.
Typical VIL and VIH vs VDD @ 3 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 22.
Typical pull-up resistance vs VDD @ 3 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 23.
Typical pull-up current vs VDD @ 3 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 24.
Typ. VOL @ VDD = 5 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 25.
Typ. VOL @ VDD = 3.3 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 26.
Typ. VOL @ VDD = 5 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 27.
Typ. VOL @ VDD = 3.3 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 28.
Typ. VOL @ VDD = 5 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 29.
Typ. VOL @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 30.
Typ. VDD - VOH @ VDD = 5 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 31.
Typ. VDD - VOH @ VDD = 3.3 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 32.
Typ. VDD - VOH @ VDD = 5 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 33.
Typ. VDD - VOH @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 34.
Typical NRST VIL and VIH vs VDD @ 3 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 35.
Typical NRST pull-up resistance vs VDD @ 3 temperatures . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 36.
Typical NRST pull-up current vs VDD @ 3 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 37.
Recommended reset pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 38.
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 39.
SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 40.
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 41.
Typical application with I2C bus and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Figure 42.
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 43.
Typical application with ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 44.
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . 85
Figure 45.
LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat recommended footprint . . . . . . . . . . . . . 87
Figure 46.
LQFP48 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Figure 47.
LQFP32 - 32-pin, 7 x 7 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . 88
Figure 48.
LQFP32 - 32-pin, 7 x 7 mm low-profile quad flat recommended footprint . . . . . . . . . . . . . 89



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