STM32F769AI datasheet(215/255 Pages) STMICROELECTRONICS

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Electrical characteristics

224

5.3.31

Quad-SPI interface characteristics

Unless otherwise specified, the parameters given in Table 118 and Table 119 for Quad-SPI

are derived from tests performed under the ambient temperature, fAHB frequency and VDD

supply voltage conditions summarized in Table 17: General operating conditions, with the

following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Capacitive load C = 20 pF

•

Measurement points are done at CMOS levels: 0.5 ₓ VDD

Refer to Section 5.3.20: I/O port characteristics for more details on the input/output alternate

function characteristics.

Table 117. LPSDR SDRAM write timings(1)

1. Guaranteed by characterization results.

Symbol

Parameter

Min

Max

Unit

tw(SDCLK)

FMC_SDCLK period

2THCLK 0.5

2THCLK + 0.5

td(SDCLKL _Data)

Data output valid time

2.5

th(SDCLKL _Data)

Data output hold time

td(SDCLKL_Add)

Address valid time

2.5

td(SDCLKL-SDNWE)

SDNWE valid time

2.5

th(SDCLKL-SDNWE)

SDNWE hold time

td(SDCLKL- SDNE)

Chip select valid time

0.5

th(SDCLKL- SDNE)

Chip select hold time

td(SDCLKL-SDNRAS)

SDNRAS valid time

1.5

th(SDCLKL-SDNRAS)

SDNRAS hold time

td(SDCLKL-SDNCAS)

SDNCAS valid time

1.5

td(SDCLKL-SDNCAS)

SDNCAS hold time

Table 118. Quad-SPI characteristics in SDR mode(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fck1/t(CK)

Quad-SPI clock

frequency

2.7 V≤ VDD<3.6 V

CL=20 pF

108

MHz

1.71 V<VDD<3.6 V

CL=15 pF

100

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