STA339BWS datasheet(52/79 Pages) STMICROELECTRONICS

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STA339BWS

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DocID015276 Rev 8

7.6.3

Limiter 2 attack/release rate (addr 0x14)

7.6.4

Limiter 2 attack/release threshold (addr 0x15)

7.6.5

Description

The STA339BWS includes two independent limiter blocks. The purpose of the limiters is to

automatically reduce the dynamic range of a recording to prevent the outputs from clipping

in anticlipping mode or to actively reduce the dynamic range for a better listening

environment such as a night-time listening mode which is often needed for DVDs. The two

modes are selected via the DRC bit in Configuration register E (addr 0x04) on page 33.

Each channel can be mapped to either limiter or not mapped, meaning that channel will clip

when 0 dBFS is exceeded. Each limiter looks at the present value of each channel that is

mapped to it, selects the maximum absolute value of all these channels, performs the

limiting algorithm on that value, and then if needed adjusts the gain of the mapped channels

in unison.

Figure 19. Basic limiter and volume flow diagram

The limiter attack thresholds are determined by the LxAT registers if EATHx[7] bits are set

to 0 else the thresholds are determined by EATHx[6:0]. It is recommended in anticlipping

mode to set this to 0 dBFS, which corresponds to the maximum unclipped output power of a

FFX amplifier. Since gain can be added digitally within the STA339BWS it is possible to

exceed 0 dBFS or any other LxAT setting, when this occurs, the limiter, when active,

automatically starts reducing the gain. The rate at which the gain is reduced when the attack

threshold is exceeded is dependent upon the attack rate register setting for that limiter. Gain

reduction occurs on a peak-detect algorithm. Setting EATHx[7] bits to 1 selects the

anticlipping mode.

The limiter release thresholds are determined by the LxRT registers if ERTHx[7] bits are set

to 0 else the thresholds are determined by ERTHx[6:0]. Settings to 1 ERTHx[7] bits the

anticlipping mode is selected automatically. The release of limiter, when the gain is again

increased, is dependent on a RMS-detect algorithm. The output of the volume/limiter block

is passed through a RMS filter. The output of this filter is compared to the release threshold,

determined by the Release Threshold register. When the RMS filter output falls below the

L2A3

L2A2

L2A1

L2A0

L2R3

L2R2

L2R1

L2R0

01101010

L2AT3

L2AT2

L2AT1

L2AT0

L2RT3

L2RT2

L2RT1

L2RT0

01101001

STA339BWS 数据表(PDF) 52 Page - STMicroelectronics

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