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STA339BWS 数据表(PDF) 27 Page - STMicroelectronics

部件名 STA339BWS
功能描述  FFX with 100-dB SNR and dynamic range
PDF  79 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA339BWS 数据表(HTML) 27 Page - STMicroelectronics

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STA339BWS
Register description
79
Fault detect recovery bypass
The on-chip power block provides feedback to the digital controller which is used to indicate
a fault condition (either overcurrent or thermal). When fault is asserted, the power control
block attempts a recovery from the fault by asserting the 3-state output, holding it for period
of time in the range of 0.1 ms to 1 second, as defined by the fault-detect recovery constant
register (FDRC registers 0x2B-0x2C), then toggling it back to normal condition. This
sequence is repeated as log as the fault indication exists. This feature is enabled by default
but can be bypassed by setting the FDRB control bit to 1. The fault condition is also
asserted by a low-state pulse of the normally high INT_LINE output pin.
7.1.2
Configuration register B (addr 0x01)
Serial audio input interface format
Serial data interface
The STA339BWS audio serial input interfaces with standard digital audio components and
accepts a number of serial data formats. STA339BWS always acts as slave when receiving
audio input from standard digital audio components. Serial data for two channels is provided
using three inputs: left/right clock LRCKI, serial clock BICKI, and serial data SDI.
Bits SAI and bit SAIFB are used to specify the serial data format. The default serial data
format is I2S, MSB first. Available formats are shown in the tables and figure that follow.
Serial data first bit
Table 16. Fault detect recovery bypass
Bit
R/W
RST
Name
Description
7
R/W
0
FDRB
0: fault detect recovery enabled
1: fault detect recovery disabled
D7
D6
D5
D4
D3
D2
D1
D0
C2IM
C1IM
DSCKE
SAIFB
SAI3
SAI2
SAI1
SAI0
10000000
Table 17. Serial audio input interface
Bit
R/W
RST
Name
Description
0
R/W
0
SAI0
Determines the interface format of the input serial
digital audio interface.
1
R/W
0
SAI1
2
R/W
0
SAI2
3
R/W
0
SAI3
Table 18. Serial data first bit
SAIFB
Format
0
MSB-first
1
LSB-first



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