STA339BWS datasheet(67/79 Pages) STMICROELECTRONICS

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STA339BWS

7.13

Extended configuration register (addr 0x36)

Extended configuration register provides access to B2DRC and biquad 5, 6 and 7.

7.13.1

Dual-band DRC (B2DRC)

STA339BWS device provide a dual-band DRC (B2DRC) on the left and right channels data

path, as depicted in Figure 20. Dual-band DRC is activated by setting MDRC[1:0] = 1x.

Figure 20. B2DRC scheme

The low frequency information (LFE) is extracted from left and right channels, removing the

high frequencies using a programmable biquad filter, and then computing the difference with

the original signal. Limiter 1 (DRC1) is then used to control left/right high frequency

components amplitude while limiter 2 (DRC2) is used to control the low frequency

components (see Chapter 7.6).

The cut-off frequency of the high pass filters can be user defined, XO[3:0] = 0, or selected

from the predefined values.

DRC1 and DRC2 are then used to independently limit L/R high frequencies and LFE

channels amplitude (see Chapter 7.6) as well as their volume control. To be noted that, in

this configuration, the dedicated channel 3 volume control can be actually acted as a bass

boost enhancer as well (0.5 dB/step resolution).

The processed LFE channel is then recombined with the L and R channels in order to

reconstruct the 2.0 output signal.

Sub-band decomposition

The sub-band decomposition for B2DRC can be configured specifying the cutoff frequency.

The cut off frequency can be programmed in two ways, using XO bits in register 0x0C, or

using “user programmable” mode (coefficients stored in RAM addresses 0x28 to 0x31).

MDRC[1]

MDRC[0]

PS48DB

XAR1

XAR2

BQ5

BQ6

BQ7

00000000

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