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TAS3001CPWR 数据表(PDF) 48 Page - Texas Instruments

部件名 TAS3001CPWR
功能描述  DIGITAL AUDIO PROCESSOR
PDF  56 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TAS3001CPWR 数据表(HTML) 48 Page - Texas Instruments

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A−2
A.1 Main Control Register (MCR)
Configuration of the digital serial audio interface is set up through the main control register as shown in Table A−2
and Table A−3. Bits F0 and F1 allow selection between three different serial data formats (left justified = 00, right
justified = 01, and I2S standard = 10). The output serial port mode set by E0 and E1 must be set to the same value
as the input serial port mode set by F0 and F1. Bits W0 and W1 allow selection between three different word widths
(16-bit word = 00, 18-bit word = 01, and 20-bit word = 10). The SC bit selects 32fs (0) or 64fs (1) bit clock. The FL
bit is primarily for use during initialization and is defined in Device Initialization (see Section 5.1). See Section 3, Serial
Control Interface, for additional information on how to address the main control register.
Table A−2. Main Control Register (MCR)
C7
C6
C5
C4
C3
C2
C1
C0
FL
SC
E1
E0
F1
F0
W1
W0
1
x
x
x
x
x
x
x
Table A−3. Main Control Register (MCR) Description
BIT
DESCRIPTOR
FUNCTION
VALUE
FUNCTION
C(7)
FL
Fast load
0
Normal operating mode
C(7)
FL
Fast load
1 (default)
Fast load mode
C(6)
SC
SCLK frequency
0
SCLK = 32
× fs
C(6)
SC
SCLK frequency
1
SCLK = 64
× fs
C(5,4)
E(1,0)
Output serial port mode
00
Left justified
C(5,4)
E(1,0)
Output serial port mode
01
Right justified
10
I2S
11
Reserved
C(3,2)
F(1,0)
Input serial port mode
00
Left justified
C(3,2)
F(1,0)
Input serial port mode
01
Right justified
10
I2S
11
Reserved
C(1,0)
W(1,0)
Serial port word length
00
16 bit
C(1,0)
W(1,0)
Serial port word length
01
18 bit
10
20 bit
11
Reserved



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