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ADAU1761BCPZ-R7 数据表(PDF) 79 Page - Analog Devices

部件名 ADAU1761BCPZ-R7
功能描述  24-Bit Audio Codec with Integrated PLL
PDF  93 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1761BCPZ-R7 数据表(HTML) 79 Page - Analog Devices

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ADAU1761
Rev. C | Page 78 of 92
R40: Control Port Pad Control 0, 16,431 (0x402F)
The optional pull-up/pull-down resistors are nominally 250 kΩ. When enabled, these pull-up/pull-down resistors set the control port
signals to a defined state when the signal source becomes three-state.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CDATP[1:0]
CLCHP[1:0]
SCLP[1:0]
SDAP[1:0]
Table 74. Control Port Pad Control 0 Register
Bits
Bit Name
Description
[7:6]
CDATP[1:0]
CDATA pad pull-up/pull-down configuration.
Setting
Configuration
00
Pull-up
01
Reserved
10
None (default)
11
Pull-down
CLATCH pad pull-up/pull-down configuration.
[5:4]
CLCHP[1:0]
Setting
Configuration
00
Pull-up
01
Reserved
10
None (default)
11
Pull-down
[3:2]
SCLP[1:0]
SCL/CCLK pad pull-up/pull-down configuration.
Setting
Configuration
00
Pull-up
01
Reserved
10
None (default)
11
Pull-down
[1:0]
SDAP[1:0]
SDA/COUT pad pull-up/pull-down configuration.
Setting
Configuration
00
Pull-up
01
Reserved
10
None (default)
11
Pull-down
R41: Control Port Pad Control 1, 16,432 (0x4030)
With IOVDD set to 3.3 V, the low and high drive strengths of the SDA/COUT pin are approximately 2.0 mA and 4.0 mA, respectively.
With IOVDD set to 1.8 V, the low and high drive strengths are approximately 0.8 mA and 1.7 mA, respectively. The high drive strength
mode may be useful for generating a stronger ACK pulse in I2C mode, if needed.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
SDASTR
Table 75. Control Port Pad Control 1 Register
Bits
Bit Name
Description
0
SDASTR
SDA/COUT pin drive strength.
0 = low (default).
1 = high.



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