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ADAU1761BCPZ-R7 数据表(PDF) 11 Page - Analog Devices |
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ADAU1761BCPZ-R7 数据表(HTML) 11 Page - Analog Devices |
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11 / 93 page  ADAU1761 Rev. C | Page 10 of 92 DIGITAL FILTERS Table 5. Parameter Mode Factor Min Typ Max Unit ADC DECIMATION FILTER All modes, typ @ 48 kHz Pass Band 0.4375 fS 21 kHz Pass-Band Ripple ±0.015 dB Transition Band 0.5 fS 24 kHz Stop Band 0.5625 fS 27 kHz Stop-Band Attenuation 67 dB Group Delay 22.9844/fS 479 μs DAC INTERPOLATION FILTER Pass Band 48 kHz mode, typ @ 48 kHz 0.4535 fS 22 kHz 96 kHz mode, typ @ 96 kHz 0.3646 fS 35 kHz Pass-Band Ripple 48 kHz mode, typ @ 48 kHz ±0.01 dB 96 kHz mode, typ @ 96 kHz ±0.05 dB Transition Band 48 kHz mode, typ @ 48 kHz 0.5 fS 24 kHz 96 kHz mode, typ @ 96 kHz 0.5 fS 48 kHz Stop Band 48 kHz mode, typ @ 48 kHz 0.5465 fS 26 kHz 96 kHz mode, typ @ 96 kHz 0.6354 fS 61 kHz Stop-Band Attenuation 48 kHz mode, typ @ 48 kHz 69 dB 96 kHz mode, typ @ 96 kHz 68 dB Group Delay 48 kHz mode, typ @ 48 kHz 25/fS 521 μs 96 kHz mode, typ @ 96 kHz 11/fS 115 μs DIGITAL INPUT/OUTPUT SPECIFICATIONS −40°C < TA < +85°C, IOVDD = 3.3 V ± 10%. Table 6. Parameter Test Conditions/Comments Min Typ Max Unit INPUT SPECIFICATIONS Input Voltage High (VIH) 0.7 × IOVDD V Input Voltage Low (VIL) 0.3 × IOVDD V Input Leakage Pull-Ups/Pull-Downs Disabled IIH @ VIH = 3.3 V −0.17 +0.17 μA IIL @ VIL = 0 V −0.17 +0.17 μA IIL @ VIL = 0 V (MCLK pin) −13.5 −0.5 μA Pull-Ups Enabled IIH @ VIH = 3.3 V −0.7 +0.7 μA IIL @ VIL = 0 V −13.5 −0.5 μA Pull-Downs Enabled IIH @ VIH = 3.3 V 2.7 8.3 μA IIL @ VIL = 0 V −0.18 +0.18 μA Input Capacitance 5 pF OUTPUT SPECIFICATIONS Output Voltage High (VOH) IOH = 2 mA @ 3.3 V, 0.85 mA @ 1.8 V 0.8 × IOVDD V Output Voltage Low (VOL) IOL = 2 mA @ 3.3 V, 0.85 mA @ 1.8 V 0.1 × IOVDD V |
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