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ADAU1761BCPZ-R7 数据表(PDF) 21 Page - Analog Devices |
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ADAU1761BCPZ-R7 数据表(HTML) 21 Page - Analog Devices |
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21 / 93 page  ADAU1761 Rev. C | Page 20 of 92 SYSTEM BLOCK DIAGRAMS AVDD IOVDD AVDD DVDDOUT LINN RINN RINP LINP JACK DETECTION SIGNAL LAUX RAUX LEFT MICROPHONE RIGHT MICROPHONE + + + AUX RIGHT AUX LEFT JACKDET/MICIN MCLK ADC_SDATA/GPIO1 DAC_SDATA/GPIO0 LRCLK/GPIO3 BCLK/GPIO2 SERIAL DATA CM SYSTEM CONTROLLER ADDR1/CDATA SDA/COUT SCL/CCLK ADDR0/CLATCH MICBIAS LOUTP LOUTN LHP MONOOUT RHP ROUTP ROUTN CAPLESS HEADPHONE OUTPUT EARPIECE SPEAKER EARPIECE SPEAKER CLOCK SOURCE THE INPUT CAPACITOR VALUE DEPENDS ON THE INPUT IMPEDANCE, WHICH VARIES WITH THE VOLUME SETTING. ADAU1761 10µF 10µF 10µF 10µF 10µF 10µF 10µF 0.1µF 10µF 10µF 0.1µF 0.1µF 9.1pF 0.1µF FROM VOLTAGE REGULATOR (1.8V TO 3.3V) 2kΩ 2kΩ 1kΩ 1kΩ 49.9Ω 0.1µF 10µF + 1.2nH Figure 26. System Block Diagram |
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