ADAV801ASTZ datasheet(41/61 Pages) AD

41 / 61 page

ADAV801

Rev. A | Page 40 of 60

Receiver Error—Address 0011000 (0x18)

Table 61. Receiver Error Register (Read-Only) Bit Map

RxValidity

Emphasis

NonAudio

NonAudio Preamble

CRCError

NoStream

BiPhase/Parity

Lock

Table 62. Receiver Error Register (Read-Only) Bit Descriptions

Bit Name

Description

RxValidity

This is the VALIDITY bit in the AES3 received stream.

Emphasis

This bit is set if the audio data is pre-emphasized. Once it has been read, it remains high and does not generate an

interrupt unless it changes state.

NonAudio

This bit is set when Channel Status Bit 1 (nonaudio) is set. Once it has been read, it does not generate another interrupt

unless the data becomes audio or the type of nonaudio data changes.

NonAudio

Preamble

This bit is set if the audio data is nonaudio due to the detection of a preamble. The nonaudio preamble type register

indicates what type of preamble was detected. Once read, it remains in its state and does not generate an interrupt

unless it changes state.

CRCError

This bit is the error flag for the channel status CRCError check. This bit does not clear until the receiver error register is read.

NoStream

This bit is set if there is no AES3/S/PDIF stream present at the AES3/S/PDIF receiver. Once read, it remains high and does

not generate an interrupt unless it changes state.

BiPhase/Parity

This bit is set if a biphase or parity error occurred in the AES3/S/PDIF stream. This bit is not cleared until the register is read.

Lock

This bit is set if the PLL has locked or cleared when the PLL loses lock. Once read, it remains in its state and does not

generate an interrupt unless it changes state.

Receiver Error Mask—Address 0011001 (0x19)

Table 63. Receiver Error Mask Register Bit Map

RxValidity

Mask

Emphasis

Mask

NonAudio

Mask

NonAudio Preamble

Mask

CRCError

Mask

NoStream

Mask

BiPhase/Parity

Mask

Lock

Mask

Table 64. Receiver Error Mask Register Bit Descriptions

Bit Name

Description

RxValidity Mask

Masks the RxValidity bit from generating an interrupt.

0 = RxValidity bit does not generate an interrupt.

1 = RxValidity bit generates an interrupt.

Emphasis Mask

Masks the Emphasis bit from generating an interrupt.

0 = Emphasis bit does not generate an interrupt.

1 = Emphasis bit generates an interrupt.

NonAudio Mask

Masks the NonAudio bit from generating an interrupt.

0 = NonAudio bit does not generate an interrupt.

1 = NonAudio bit generates an interrupt.

NonAudio Preamble Mask

Masks the NonAudio preamble bit from generating an interrupt.

0 = NonAudio preamble bit does not generate an interrupt.

1 = NonAudio preamble bit generates an interrupt.

CRCError Mask

Masks the CRCError bit from generating an interrupt.

0 = CRCError bit does not generate an interrupt.

1 = CRCError bit generates an interrupt.

NoStream Mask

Masks the NoStream bit from generating an interrupt.

0 = NoStream bit does not generate an interrupt.

1 = NoStream bit generates an interrupt.

BiPhase/Parity Mask

Masks the BiPhase/Parity bit from generating an interrupt.

0 = BiPhase/Parity bit does not generate an interrupt.

1 = BiPhase/Parity bit generates an interrupt.

Lock Mask

Masks the Lock bit from generating an interrupt.

0 = Lock bit does not generate an interrupt.

1 = Lock bit generates an interrupt.

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