L9679P datasheet(175/272 Pages) STMICROELECTRONICS

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L9679P

Remote sensor interface

271

The remote sensor interface is also able to detect faults occurring on the sensor interface.

The Remote Sensor Data Register (RSDRx) will report multiple fault flags.

When the number of bits decoded is incorrect (either too many or too few), a bit error is

indicated. When any bit error is detected (bit time, too many bits, too few bits), the decoder

will revert to the minimum bit time of the selected range and the message is discarded.

Error bit INVALID is an OR-ed combination of the following errors:



Start bit error outside of selected operating range



Data length error or stop bit error



Parity Error of received Remote sensor Message



Bit time error (a data bit edge is not received inside the expected time window)

9.1.2

Sensor data integrity: LCID and CRC

Each RSDRx data register contains a Logical Channel ID which is a 4/2-bit field for remote

sensors used to link the received data to the corresponding logical channel number. Each

RSDRx register contains also a CRC bit field computed on the data packet for data integrity

check. To satisfy functional safety requirements LCID, DATA and CRC bit fields propagate

through the same data path as a single item to the SPI output.

The polynomial calculation implemented for PSI5 data is described as in PSI5 specification

g(x)=1+x+x^3 with initialization value equal to ‘111’.

Below are the equations to calculate the CRC in combinatorial way.

CRC[2] = CRCext[0]+D[0]+D[1]+D[3]+D[6]+D[7]+D[8]+D[10]+D[13]+D[14]+D[15]

CRC[1] = CRCext[2]+D[0]+D[1]+D[2]+D[4]+D[7]+D[8]+D[9]+D[11]+D[14]+D[15]+D[16]

CRC[0] = CRCext[1]+CRCext[0]+D[0]+D[2]+D[5]+D[6]+D[7]+D[9]+D[12]+D[13]+D[14]+D[16]

Where D[16:0]= RSDR[16:0] and CRCext[n] are the starting seed values (all '1').

9.1.3

Detailed description

Manchester decoding

The Manchester decoder will support remote sensor communication as per PSI

specification rev 1.3 for the modes configurable via the STS bits in the RSCRx registers.

The Manchester Decoder checks the duty-cycle and period of the start bits to determine

their validity, depending on the configuration of the PERIOD_MEAS_DISABLE bit in the

RSCRx registers. The expected time windows for the mid bit transitions of each subsequent

bit within the received frame are determined by means of the internal oscillator time base.

Glitches shorter than 25% of the minimum bit time duration are rejected.

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