L9679P datasheet(178/272 Pages) STMICROELECTRONICS

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Remote sensor interface

L9679P

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DocID029275 Rev 1

9.2

Test mode

In order test the input structures of the connected microcontroller, the L9679P features a

wheel speed test mode that allows test patterns to be applied on the four wheel speed

outputs WS0-WS1. The test mode can be entered via SPI and the test patterns can also be

controlled via SPI commands. Test patterns can be composed only of static high or low

signals, which can be selected via SPI. For failsafe reasons only one channel at a time can

be switched into test mode.

9.3

Remote sensor interface fault protection

9.3.1

Short to ground, current limit

Each output is short circuit protected by an independent current limit. Should the output

current level reach or exceed the ILIMTH for a time period greater than TILIMTH or the

remote sensor interface the output stage is disabled. An internal up-down counter will count

in 25 μs increment up to TILIMTH. The filter time is chosen in order to avoid false current

limit detection for in-rush current that may happen at interface switch-on. When the output is

turned off due to current limit, the appropriate fault code STG is set in the Remote Sensor

Data Register (RSDR). The fault timer latch is cleared when the sensor channel is first

disabled and then re-enabled through the Remote Sensor Control Register (RSCTRL). This

fault condition does not interfere neither with the normal operation of the IC, nor with the

operation of the other channels. When a sensor fault is detected, the RSFLT bit of the GSW

is set indicating a fault occurred and can be decoded by addressing the RSDR register.

In order to fulfill the blanking time requirement at channel activation as per PSI-5

specification, a dedicated masking time is applied to the current limitation fault detection

each time a channel is activated.

9.3.2

Short to battery

All outputs are independently protected against a short to battery condition. Short to battery

protection disconnects the channel from its supply rail to guarantee that no adverse

condition occurs within the IC. The short-to-battery detection circuit has input offset voltage

(10mV, minimum) to prevent disconnecting of the output under an open circuit condition. A

short to battery is detected when the output RSUx pin voltage increases above SATBUCK

or SYNCBOOST (depending on operation) supply pin voltage for a TSTBTH time. An internal

up-counter will count in 1.5 μs increment up to TSTBTH. The counter will be cleared if the

short condition is not present for at least 1.5 μs. The channel in short to battery is not shut

down by this condition. Other channels are not affected in case of short of one output pin.

As in the case previously described, the STB fault code can be read from RSDR bits and

any fault will set the RSFLT bit of the global status word register (GSW). The STB bit is

cleared upon read or upon channel disabled via SPI RSCTRL register.

9.3.3

Cross link

The device provides also the capability of a cross link check between outputs, in order to

reveal conditions where two output channels are in short. This functionality is allowed by

enabling one output channel, while asking for voltage measurement on any of the other

ones.

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