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L9679P 数据表(PDF) 181 Page - STMicroelectronics

部件名 L9679P
功能描述  Automotive advanced airbag IC for mid/high end applications
PDF  272 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L9679P 数据表(HTML) 181 Page - STMicroelectronics

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L9679P
Watchdog timers
271
10.1.1
Watchdog timer configuration
The watchdog timer can be configured on two different frequency modes:
Fast watchdog with maximum range of 2ms and a resolution of 8 μs;
Slow watchdog with maximum range of 16.3ms and a resolution of 64 μs.
The watchdog window times are SPI programmable. The configuration of watchdog timer
frequency and window times can be done by setting the Watchdog Timer Configuration
Register (WDTCR) with the appropriate values. However, this configuration is accepted only
when the device is in the Init operating state, as shown in Figure 10. As soon as the device
enters in Diag state, the watchdog control is enabled and the watchdog configuration is fixed
and cannot be changed anymore.
Table 13. Watchdog timer status description
State/Signal
Description
WD1 INITIAL
Default state entered from startup. While in this state, no watchdog service is
required, and the IC may stay in this state indefinitely. For system safety, all
arming signals are disabled during this state to prevent deployment.
WD1 RUN
Normal run time state where WD1 service is required.
WD1 TEST
A special state used to test the watchdog function. Normally, this state will only
be checked once per power cycle by the software, but there is no inherent
restriction in the watchdog logic preventing periodic testing. This state allows
testing of the watchdog without setting WD1_LOCKOUT=1, which can only be
cleared via WSM reset. Deployment is inhibited when the WD state machine is in
this state.
WD1 RESET
State entered when a WD1_ERROR occurs. This is a timed-duration state that is
automatically exited after 1ms.
WD1 OVERRIDE
A special state used to disable watchdog functionality for development purposes.
Other logic within the IC can use this state to emulate the WD1 RUN state
without the need to service WD1.
WSM_RESET
Signal used to reset the WD1 state machine to the WD1 INITIAL state and all
signals to their inactive values
WD1_refresh OK
Signal that is asserted only if the watchdog is refreshed ('A' - 'B' or 'B' - 'A' seq.)
within the WD1 time window
WD1_ERROR
Signal that is asserted if the watchdog refresh fails to occur during the WD1 time
window.
WD1_WDR
Watchdog Reset – latched signal that is activated whenever a watchdog error is
qualified. For WD1, this occurs when WD1 service is required, but not received.
This signal is SPI-readable.
WD1_TM
Test Mode – a signal that indicates that WD1 is being tested. This signal is SPI-
readable.
WD1_LOCKOUT
A latched signal activated if an unexpected WD1 error occurs. This signal is
permanently latched when set (until WSM_RESET). When set, all arming signals
are disabled, preventing deployment. This signal is SPI-readable.
SPI_WD1_TEST
SPI command used to enter WD1 TEST state from WD1 RUN state, or to enter
WD1 OVERRIDE state from INITIAL state if WDT/TM pin voltage is greater than
the threshold. This command has no effect in other states.



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