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ATPL230A 数据表(PDF) 10 Page - ATMEL Corporation

部件名 ATPL230A
功能描述  ATPL Series Power Line Communications Device
PDF  122 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

ATPL230A 数据表(HTML) 10 Page - ATMEL Corporation

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ATPL230A [DATASHEET]
Atmel-43053J-ATPL230A-Datasheet_22-Sep-16
10
5.3
Zero-crossing detection
5.3.1
Overview
Zero Crossing Detector block works predicting future zero crossings of the Mains signal in function of its past zero
crossings. To achieve this, the system embeds a configurable Input Signal Management (ISM) block and a PLL, both
of which manage Zero Crossing Detector Input Signal to calculate Zero Crossing Output Flag. The zero-cross
detection of waves of 50 Hz and 60 Hz with ±10% of error is supported.
The PLL block interprets its input signal such a way that it indicates a zero cross in the middle of a positive pulse. It is
important to note that depending on the external circuit implementing the Zero Crossing Detector Input Signal this
interpretation is not always correct. Thus, for some cases it is required to transform the Input Signal in a signal where
the middle of a positive pulse corresponds to a truly zero cross. This transformation is implemented through the Input
Signal Management (ISM) block, configured by MODE_INV and MODE_REP fields in ZC_CONFIG register.
Zero Crossing Detector Input Signal (VZ CROSS) must fulfil some requirements. The first requirement is that VZ
CROSS signal must be a pulse train with a duty cycle being >60% or <40% (polarity is configurable). In addition, if we
have to detect ascent or descent zero-crossing, the Zero Crossing Detector Input Signal period must be equal than
the period of the wave we need to obtain zero-crossing. Ascent and descent Zero Crossing Detection are configured
by setting MODE_MUX and MODE_ASC fields in ZC_CONFIG register.
Figure 5-3.
Typical circuit, using a bidirectional optocoupler and a Schmitt trigger
The input signal “VZ CROSS” (wider line) generated by this circuit for Zero Cross Detection of the wave “L”-“N” (finer
line) is plotted in next figure. The digital signal at output of Input Signal Management (ISM) is plotted in Figure 5-4.
Figure 5-4.
Digital signal (dashed line) at output of Input Signal Management (ISM) internal block
Mains Signal
ZC signal provided
to VZ CROSS



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