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ATPL230A 数据表(PDF) 32 Page - ATMEL Corporation |
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ATPL230A 数据表(HTML) 32 Page - ATMEL Corporation |
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32 / 122 page ![]() ATPL230A [DATASHEET] Atmel-43053J-ATPL230A-Datasheet_22-Sep-16 32 8.3.1.6 CRC PRIMEPLUS Configuration Register Name: PRIMEPLUS_CRC_CONFIG Address: 0xFEF4 Access: Read/Write Reset: 0x14 PRIMEPLUS_CRC_CONFIG register allows the user to configure feedback type and width of the PRIME v1.4 mode physical CRC computation algorithm. • FB_TYPE: ‘0’: Computation procedure must end with extra bytes with value zero added to the data ones (User added). ‘1’: Extra bytes addition is not required. • WIDTH (3:0): Represents the grade of the polynomial used by the algorithm. 76543210 - - - FB_TYPE WIDTH WIDTH (3:0) Polynomial bits 08 19 210 311 412 513 614 715 >7 16 |
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