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NCV7728DPAR2G 数据表(PDF) 15 Page - ON Semiconductor |
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NCV7728DPAR2G 数据表(HTML) 15 Page - ON Semiconductor |
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15 / 27 page ![]() NCV7728 www.onsemi.com 15 Table 2. SPI OUTPUT DATA FRAME Output Data Bit Number Bit Name Bit Description Bit Status PRE_15 TSD Latched Thermal Shutdown 0 = No Fault 1 = Fault 15 OCS Over Current Shutdown Global Notification 0 = No Fault 1 = Fault 14 PSF Power Supply Failure on VS1 and/or VS2 Under Voltage and Over Voltage Monitoring 0 = No Fault 1 = Fault 13 ULD Under Load Detection Global Notification 0 = No Fault 1 = Fault 12 HB6 [1:0] Half Bridge 6 Status 0x00b – Output Disable 0x01b – OCS 0x10b – ULD 0x11b – Output Enabled 11 10 HB5 [1:0] Half Bridge 5 Status 9 8 HB4 [1:0] Half Bridge 4 Status 7 6 HB3 [1:0] Half Bridge 3 Status 5 4 HB2 [1:0] Half Bridge 2 Status 3 2 HB1 [1:0] Half Bridge 1 Status 1 0 TW Thermal Warning Global Notification 0 = No Fault 1 = Fault HBx[1:0] bits are priority encoded to provide the status information of each of the half-bridge outputs. Figure 14 shows the priority encoding state diagram for the HBx[1:0] bits. |
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