SSM3515CCBZ-R7 datasheet(25/41 Pages) AD

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Data Sheet

SSM3515

Rev. A| Page 25 of 41

FAULTS AND LIMITER STATUS REPORTING

The SSM3515offers comprehensive protections against the

faults at the outputs and reporting to help with system design.

The faults listed in Table 17are reported usingthe status registers.

Table 17. Register 0x0A, Faults

Fault Type

Flag Set Condition

Status Reported

5 V Regulator UV

5 V regulator voltage at

VREG50/AVDD < 3.6 V

Bit 6, UVLO_VREG

Limiter/GainReduction

Engage

Limiter engaged

Bit 5, LIM_EG

Clipping

DAC clipping

Bit 4, CLIP

Output Overcurrent

(OC)

Output current > 6 A

peak

Bit 3, AMP_OC

Die Overtemperature

(OT)

Die temperature >

145°C

Bit 2, OTF

Die Overtemperature

Warning (OTW)

Die temperature >

117°C

Bit 4, OTW

Battery Voltage >

VBAT_INF

Battery voltage PVDD >

VBAT_INF

Bit 0, BAT_WARN

The faults listed in Table 17 are reported in Register 0x0A and

can be read via I2C by the microcontroller in the system.

In the event of a fault occurrence, how the device reacts to the

faults can be controlled by using Register 0x0B.

Table 18. Register 0x0B, Fault Recovery

Fault Type

Flag Set Condition

Status Reported

OTW

The amount of gain

reduction applied if there

is an OTW

Bits[7:6], OTW_GAIN

Manual

Recovery

Use to attempt manual

recovery in case of a fault

event

MRCV

Autorecovery

Attempts

When autorecovery from

faults is used, set the

number of attempts using

this bit

Bits[4:3], MAX_AR

Recovery can be automatic

or manual

ARCV_UV

Die OT

Recovery can be automatic

or manual

ARCV_OT

Recovery can be automatic

or manual

ARCV_OC

When the automatic recovery mode is set, the device attempts

to recover itself after the fault event and, in case the fault

persists, then the device sets the fault again. This process

repeats until the fault is resolved.

When the manual recovery mode is used, the device shuts down

and the recovery must be attempted using the system

microcontroller.

VBAT SENSING

The SSM3515contains an 8-bit ADC that measures the voltage

of the battery voltage (VBAT) supply. The battery voltage

information is stored in Register 0x06as an 8-bit unsigned format.

The ADC input range is fixed internally as 3.8 V to 16.2 V. To

convert the hexidecimal (hex) value to the voltage value, use the

following steps:

1. Convert the hex value to decimal. For example, if the hex

value is 0xA9, the decimal value = 169.

2. Calculate the voltage using the following equation:

Voltage = 3.8 V + 12.4 V × Decimal Value/255

With a decimal value of 169,

Voltage = 3.8 V + 12.4 V × 169/255 = 12.02 V

LIMITER AND BATTERY TRACKING THRESHOLD

CONTROL

The SSM3515contains an output limiter that can be used limit

the peak output voltage of the amplifier. The limiter works on

the rms and peak value of the signal. The limiter threshold,

slope, attack rate, and release rate are programmable using

be enabled or disabled using LIM_EN,Bits[1:0] inRegister 0x07.

The threshold at which the output is limited is determined by

the LIM_THRES register setting, in Register 0x08, Bits[7:3].

When the ouput signal level exceeds the set therhold level, the

limiter activates and limits the signal level to the set limit. Below

the set threshold, the output level is not affected. The limiter

threshold can be set from 1 V peak to 15 V peak.

The limiter threshold can be set above the maximum output

voltage ofthe amplifier. Inthis case, the limiter allows maximum

peak output; in other words, the output may clip depending on

the power supply voltage and not the limiter.

The limiter threshold can be set as fixed or to vary with the

battery voltage via the VBAT_TRACKbit (Register 0x07,Bit2).

When set to fixed, the limiter threshold is fixed and does not

vary with battery voltage.The threshold canbe set from1 V peak

to 15 V peak using the LIM_THRES bit (see Figure 68).

When set to a variable threshold, the SSM3515monitors the

VBAT supply and automatically adjusts the limiter threshold

based on the VBAT supply voltage.

The VBAT supply voltage at which the limiter threshold level

begins to decrease the output level is determined by the VBAT

inflection point, the VBAT_INF bits (Register 0x09, Bits[7:0]).

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