MAS6503 datasheet(21/34 Pages) MAS

21 / 34 page

DA6503.005

14 December 2016

21 (34)

SERIAL DATA INTERFACE CONTROL

Serial Interface

MAS6503 can be operated either via 2-wire serial

I2C bus or via 4-wire serial SPI bus. Selection

between I2C and SPI communication is done by

XSPI pin. XSPI=high selects I2C and XSPI=low

selects SPI communication.

2-wire serial I2C bus type interface comprises of

serial clock input (SCL) and bi-directional serial

data (SDA) input/output. I2C bus is used to write

configuration data to sensor interface IC and read

the measurement result when A/D conversion has

been finished. The interface is also used for reading

the calibration EEPROM memory.

Note: The 2-wire I2C bus of MAS6503 supports

only basic I2C bus communication protocol but not

for example 10-bit addressing, arbitration and clock

stretching features of the I2C bus specification.

The alternative 4-wire serial SPI bus type interface

comprises of serial clock input (SCLK), serial data

input (MOSI), serial data output (MISO) and chip

select input (XCS).

Digital interface includes also end of conversion

(EOC) and master reset (XCLR) pins. Rising edge

in the EOC pin indicates that the conversion is

ready and the result can be read out through serial

interface.

XCLR is used to reset the MAS6503. A reset

initializes registers (set to value 00HEX), counters

and the serial communication bus. Alternatively

device can be reset via serial bus by writing any

data to Reset register (address E0/60HEX). The

Reset register bits don’t have any function. Reading

from the reset register is not possible.

After connecting the supply voltage to MAS6503,

and before starting operating the device via the

serial bus, it is required to reset the device if the

supply voltage rise time has been longer than 1ms.

However it is recommended to reset the device

manually after every power up to guarantee proper

I2C Bus Communication

In MAS6503 the I2C bus communication is selected

by setting XSPI pin high.

The I2C bus standard makes it possible to connect

several devices on same bus. The devices are

distinguished from each other by unique device

addresses. In MAS6503 there is both a hard wired

and programmable device address. Both hard wired

and programmable addresses can be used to

address MAS6503. The MAS6503 hard wired

device address is shown in the following table. The

LSB bit of the device address defines whether the

bus is configured to Read (1) or Write (0) operation.

See figure 11 in Application Information chapter

showing

MAS6503

configured

for

I2C

bus

communication.

The programmable device address is located in the

EEPROM register DEHEX/5EHEX which has been

factory programmed to value EAHEX (%11101010)

which is the same as the fixed device address of

MAS6503. When unique device address is needed

it can be programmed to this register. The

programmable I2C device address is read from

EEPROM memory only during power on reset or

manual reset situations. To guarantee that the

programmable address is read from EEPROM the

device can be reset manually by using XCLR pin or

Reset register (E0/60HEX).

Table 9. MAS6503 I2C bus hard wired device address (EA/EBHEX)

W/R

0/1

I2C Bus Protocol Definitions

Data transfer is initiated with a Start bit (S) when

SDA is pulled low while SCL stays high. Then, SDA

sets the transferred bit while SCL is low and the

data is sampled (received) when SCL rises. When

the transfer is complete, a Stop bit (P) is sent by

releasing the data line to allow it to be pulled up

while SCL is constantly high.

Figure 4 on next page shows the start (S) and stop

(P) bits and a data bit. Data must be held stable at

the SDA pin when SCL is high. Data at the SDA pin

can change value only when SCL is low.

Each SDA line byte transfer must contain 8-bits

where the most significant bit (MSB) always comes

first. Each byte has to be followed by an

acknowledge bit (see further below). The number of

bytes transmitted per transfer is unrestricted.

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