MAS6503 datasheet(13/34 Pages) MAS

13 / 34 page

DA6503.005

14 December 2016

13 (34)

PROGRAMMABLE I2C DEVICE ADDRESS (DE/5EHEX)

The

MAS6503

has

both

hard

wired

and

programmable

I2C

device

addresses.

The

programmable I2C device address is factory

programmed to value EA HEX (%11101010) which is

the same as the hard wired device address of

MAS6503. When unique device address is needed

it can be programmed to the Programmable I2C

Device Address register (DEHEX/5EHEX). However

note that the hard wired address cannot be

changed and that the MAS6503 will respond to both

hard wired and programmed I2C device addresses.

RESET REGISTER (E0/60HEX)

This register is used to reset all control registers

(addresses E1H…EBH) to a zero value. There are

no data bits in this register. However it is necessary

to write dummy data to this register to make a

reset.

The reset will take place immediately after any data

has been written to the address E0/60HEX via the

I2C or SPI interface.

TEST REGISTER (E1/61HEX)

The Test register is mainly for a testing purpose. In

normal operation the Test register default value is

00HEX and the internal clock oscillator frequency

500 kHz. The system runs from system clock

frequency MCLK which is normally half from the

oscillator frequency i.e. 250 kHz. However Test

clock divisions of 2 and 4 respectively. See Internal

System Clock Frequency MCLK selections on

Electrical Characteristics page 5 as function of DIV

and ENDIV bit selections.

FOSC can be used to force the internal oscillator to

be on all the time. This is for internal oscillator

trimming purpose only. Normally (FOSC=0) the

internal oscillator is turned on only during the

measurements to save power and the OSC pin

output is at logic low. To get the internal 500 kHz

clock signal out from OSC pin it is necessary to set

FOSC=1.

ENDIV bit can be used to enable an extra system

clock divider. By default it is disabled (ENDIV=0).

The STEST bits are used for connecting different

internal signals to the TEST1 and TEST2 pins that

are necessary in the testing. In STEST=000…100

selections the TEST1 and TEST2 pins act as

outputs and in STEST=101 selection they act as

inputs.

SEL_EXTCLK bit selects between internal clock

oscillator (OSC pin as digital output) which is the

default setting and external clock signal (OSC pin

as digital input). Note that if SEL_EXTCLK=1 is

selected the internal oscillator is disabled and OSC

pin acts as digital input despite of FOSC selection.

Note also that the frequency division selections DIV

or ENDIV do not apply to OSC pin clock signals.

The internal 500 kHz clock signal from OSC pin and

the external clock signal applied to OSC pin are not

affected by the DIV and ENDIV selections.

MAS6503 数据表(PDF) 13 Page - Micro Analog systems

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