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NUC505-YO2G 数据表(PDF) 36 Page - Nuvoton Technology Corporation |
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NUC505-YO2G 数据表(HTML) 36 Page - Nuvoton Technology Corporation |
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36 / 130 page  NUC505 July. 26, 2018 Page 36 of 130 Rev.1.08 39 AVSSADC A MFP0 Ground pin for analog SAR-ADC. 40 PA.0 I/O MFP0 General purpose digital I/O pin. ADC_CH0 A MFP1 ADC channel 0 analog input. 41 PA.1 I/O MFP0 General purpose digital I/O pin. ADC_CH1 A MFP1 ADC channel 1 analog input. 42 PA.2 I/O MFP0 General purpose digital I/O pin. ADC_CH2 A MFP1 ADC channel 2 analog input. I2S_MCLK O MFP2 I 2S master clock output pin. 43 PA.3 I/O MFP0 General purpose digital I/O pin. ADC_CH3 A MFP1 ADC channel 3 analog input. I2S_DI I MFP2 I 2S data input. 44 PA.4 I/O MFP0 General purpose digital I/O pin. ADC_CH4 A MFP1 ADC channel 4 analog input. I2S_DO O MFP2 I 2S data output. 45 VDD12 A MFP0 Power supply for I/O ports, DC 1.2V 46 VDD A MFP0 Power supply, DC 3.3V. 47 LDO_CAP A MFP0 LDO output pin. 48 VSS A MFP0 Ground. Note: The thermal pad (EPD) on the bottom of QFN package should be connected to GND. |
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