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NUC505-YO2G 数据表(PDF) 13 Page - Nuvoton Technology Corporation |
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NUC505-YO2G 数据表(HTML) 13 Page - Nuvoton Technology Corporation |
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13 / 130 page ![]() NUC505 July. 26, 2018 Page 13 of 130 Rev.1.08 ─ Supports chip Power-off by register setting ─ Supports Power-on time-out for low battery protection Analog to Digital Converter ─ Analog input voltage range: 0~ AVDD ─ Supports single 12-bit SAR ADC conversion ─ 12-bit resolution and 10-bit accuracy is guaranteed ─ Up to 1MSPS conversion with ADC_CH1, and up to 200 kSPS with others (except ADC_CH0). ─ Up to 8 external single-ended analog input channels ─ Supports single ADC interrupt ─ An A/D conversion can be triggered by software control Built-in LDO with operating voltage 3.3V Low Voltage Detector (LVD) ─ With 2 levels: 2.8V / 2.6V Low Voltage Reset (LVR) ─ Threshold voltage level: 2.4 V Power Management ─ Advanced power management including Deep Power-down, Power-down, Idle and Normal Operating modes ─ Normal Operating mode CPU runs normally and all clocks on; the current consumption is around 46 mA (at 96 MHz CPU clock) ─ Idle mode CPU clock stop, and all other clocks on ─ Power-down mode All clocks stop, except LXT and LIRC, with SRAM retention; the current consumption is around 700 uA ─ Deep Power-down mode All clocks stop, except LXT and LIRC, without SRAM retention; the current consumption is around 7 uA Operating Temperature: -40℃~+85℃ Packages ─ All Green package (RoHS) ─ QFN 88-pin (10mm x 10mm) ─ LQFP 64-pin (7mm x 7mm) ─ LQFP 48-pin (7mm x 7mm) ─ QFN 48-pin (7mm x 7mm) |
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