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NUC505-YO2G 数据表(PDF) 78 Page - Nuvoton Technology Corporation |
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NUC505-YO2G 数据表(HTML) 78 Page - Nuvoton Technology Corporation |
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78 / 130 page ![]() NUC505 July. 26, 2018 Page 78 of 130 Rev.1.08 SPI Flash 0x2000_AB00 0x2000_B2FF 2 Kbytes 2 Kbytes 0x2000_0000 0x2001_FFFF 0x0000_0000 0x0000_07FF 0x0000_0800 0x001F_FFFF Vector mapping SYS_RVMPADDR[31:0] = 0x2000_AB00 SYS_RVMPLEN[31:24] = 0x02 Example: Figure 6.2-4 Vector Map Module Block 6.2.7 AHB Bus Arbitration The internal bus of NUC505 is an AHB-Compliant Bus and supports to connect with the standard AHB master or slave. The NUC505 AHB arbiter provides a choice of two arbitration algorithms for simultaneous requests. These two arbitration algorithms are the Fixed-priority mode and the Round- robin- priority (rotate) mode. The selection of modes and types is determined in the PRISEL field of the SYS_AHBCTL control register. Fixed Priority Mode 6.2.7.1 Fixed priority mode is selected if PRISEL = 0. The order of priorities on the AHB mastership among the on-chip master modules are listed in Table 6.2-3. Priority Sequence (PRISEL = 0) AHB Bus Priority 1 (Lowest) Cortex-M4 I 2 Cortex-M4 D 3 Cortex-M4 System 4 SPIM 5 USBD |
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