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NUC505-YO2G 数据表(PDF) 80 Page - Nuvoton Technology Corporation |
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NUC505-YO2G 数据表(HTML) 80 Page - Nuvoton Technology Corporation |
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80 / 130 page ![]() NUC505 July. 26, 2018 Page 80 of 130 Rev.1.08 6.2.8 System Timer (Systick) The Cortex ® -M4 includes an integrated system timer, SysTick, which provides a simple, 24-bit clear- on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The counter can be used as a Real Time Operating System (RTOS) tick timer or as a simple counter. When system timer is enabled, it will count down from the value in the SysTick Current Value Register (SYST_CVR) to zero, and reload (wrap) to the value in the SysTick Reload Value Register (SYST_RVR) on the next clock cycle, and then decrement on subsequent clocks. When the counter transitions to zero, the COUNTFLAG status bit is set. The COUNTFLAG bit clears on reads. The SYST_CVR value is UNKNOWN on reset. Software should write to the register to clear it to zero before enabling the feature. This ensures the timer will count from the SYST_RVR value rather than an arbitrary value when it is enabled. If the SYST_RVR is zero, the timer will be maintained with a current value of zero after it is reloaded with this value. This mechanism can be used to disable the feature independently from the timer enable bit. For more detailed information, plea se refer to the “ARM ® Cortex® -M4 Technical Reference Manual” and “ARM ® v6-M Architecture Reference Manual”. |
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