GS3471 datasheet(72/179 Pages) SEMTECH

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GS3471

Final Data Sheet Rev.4

PDS-060498

September 2017

72 of 179

Semtech

www.semtech.com

In SD mode, ancillary data is placed in the LSW of the FIFO. The MSW is set to zero.

If the ANC_TYPE[5:1]_DS[2:1] registers are all set to zero, the device extracts all types

of ancillary data. If programmable ancillary data extraction is required, then up to five

types of ancillary data to be extracted can be programmed in the

ANC_TYPE_[5:1]_DS[2:1] registers (see Section 4.19.1).

Additionally, the lines from which the packets are to be extracted can be programmed

into the ANC_LINEA and ANC_LINEB registers, allowing ancillary data from a maximum

of two lines per frame to be extracted. If only one line number register is programmed

(with the other set to zero), ancillary data packets are extracted from one line per frame

only. When both registers are set to zero, the device extracts packets from all lines.

To start Ancillary Data Extraction, the ANC_DATA_EXT_MASK bit of the host interface

must be set LOW. Ancillary data packet extraction begins in the following frame (see

Figure 4-38: Ancillary Data Extraction - Step A).

Figure 4-38: Ancillary Data Extraction - Step A

Ancillary data is written into Bank A until full. The Y/1ANC and C/2ANC output flags can

be used to determine the length of the ancillary data extracted and when to begin

reading the extracted data from memory.

While the ANC_DATA_EXT_MASK bit is set LOW, the ANC_DATA_SWITCH bit can be

set HIGH during or after reading the extracted data. New data is then written into Bank

B (up to 1024 x 16-bit words), at the corresponding host interface addresses (see Figure

4-39: Ancillary Data Extraction - Step B).

ANCDATA

1023

ApplicationLayer

ReadPointer

Internal Write

Pointer

BankA

ANC_DATA_SWITCH=LOW

1023

BankB

C00

FFF

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