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GS3471 数据表(PDF) 22 Page - Semtech Corporation |
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GS3471 数据表(HTML) 22 Page - Semtech Corporation |
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22 / 179 page ![]() GS3471 Final Data Sheet Rev.4 PDS-060498 September 2017 22 of 179 Semtech www.semtech.com Figure 4-2: Flexible Power Down Modes The device has three other primary modes of operation which include SMPTE mode, DVB-ASI mode, and Data-Through mode. In SMPTE mode, when receiving a SMPTE compliant SDI input, the GS3471 performs full SMPTE processing, and features a number of data integrity checks and measurement capabilities. The device also supports ancillary data extraction, and can provide entire ancillary data packets through host-accessible registers. Packet detection and error handling features are also offered. All processing features are optional, and may be individually enabled or disabled through register programming. In DVB-ASI mode, sync word detection, alignment, and 8/10bit decoding is applied to the received data stream. While in Data-Through mode, all forms of SMPTE and DVB-ASI processing are disabled, and the device can be used as a simple serial to parallel converter. The GS3471 includes an audio de-embedder and audio clocks are internally generated. Up to eight channels (two audio groups) of serial digital audio may be extracted from the video data stream, in accordance with SMPTE ST 272-C and SMPTE ST 299. The output audio formats supported by the device include AES/EBU and I2S. A variety of audio processing features are provided to ease implementation. The GS3471 can equalize 3G SDI, HD-SDI, and SD-SDI serial digital signals, and will typically equalize up to 200m of Belden 1694A cable at 2.97Gb/s, 280m at 1.485Gb/s, and 500m at 270Mb/s. When DC-coupling the output of a device to a 1.2V CML load, the GS3471 typically consumes 300mW of power. PCLK PDATA Mode A: With CSR access Default: All functions disabled PDATA Mode B: PCLK Active PDATA Mode C: Retimed Serial Loopback active PDATA Mode D: Non-Retimed Serial Loopback active PDATA Mode E: Retimed Loopback and PCLK locked to selected Input PDATA Mode F: Non-Retimed Loopback with PCLK (not locked) — Manual Rate Select Mode PCLK PCLK PCLK PCLK PCLK GS3471 GS3471 GS3471 GS3471 GS3471 GS3471 |
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