MMA8652FC datasheet(18/65 Pages) NXP

18 / 65 page

MMA8652FC

Sensors

Freescale Semiconductor, Inc.

5.10

Interrupt register configurations

There are seven configurable interrupts in the MMA8652FC: Data Ready, Motion/Freefall, Tap (Pulse), Orientation, Transient,

FIFO events, and Auto-SLEEP events.

Figure 9. System interrupt generation

•

The MMA8652FC features an interrupt signal that indicates when a new set of measured acceleration data is available, thus

simplifying data synchronization in the digital system that uses the device.

•

The MMA8652FC may also be configured to generate other interrupt signals accordingly, to the programmable embedded

functions of the device for Motion, Freefall, Transient, Orientation, and Tap.

5.11

Serial I2C interface

Acceleration data may be accessed through an I2C interface, thus making the device particularly suitable for direct interfacing to

a microcontroller. The acceleration data and configuration registers embedded inside the MMA8652FC are accessed through the

I2C serial interface (Table 10).

•

To enable the I2C interface, VDDIO line must be tied high (to the interface supply voltage). If VDD is not present and VDDIO

is present, then the MMA8652FC is in OFF mode—and communications on the I2C interface are ignored.

•The I2C interface may be used for communications between other I2C devices; the MMA8652FC does not affect the I2C bus.

The I2C interface is compliant with Fast mode (400 kHz), and Normal mode (100 kHz) I2C standards (Table 11).

I2C operation:

The transaction on the bus is started through a start condition (START) signal. A START condition is defined as a high-to-

low transition on the data line while the SCL line is held high. After START has been transmitted by the Master, the bus is

considered busy.

The next byte of data transmitted after START contains the slave address in the first seven bits. The eighth bit tells

whether the Master is receiving data from the slave or is transmitting data to the slave.

After a start condition and when an address is sent, each device in the system compares the first seven bits with its

address. If the device’s address matches the sent address, then the device considers itself addressed by the Master.

Table 10. Serial Interface pins

Pin Name

Pin Description

Notes

SCL

I2C Serial Clock

There are two signals associated with the I2C bus; the Serial Clock Line (SCL) and the

Serial Data line (SDA).

• SDA is a bidirectional line used for sending and receiving the data to/from the interface.

• External pullup resistors connected to VDDIO are expected for SDA and SCL. When the bus

is free, both SCL and SDA lines are high.

SDA

I2C Serial Data

Interrupt

Controller

Data Ready

Motion/Freefall

Tap (Pulse)

Orientation

Transient

FIFO

Auto-SLEEP

INT ENABLE

INT CFG

INT1

INT2

Configurable interrupts

These seven interrupt sources can be

routed to one of two interrupt pins.

The interrupt source must be enabled

and configured.

If the event flag is asserted because

the event condition is detected, then

the corresponding interrupt pin (INT1

or INT2) will assert.

MMA8652FC 数据表(PDF) 18 Page - NXP Semiconductors

MMA8652FC 数据表(HTML) 18 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

数据表下载