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MMA8652FC 数据表(PDF) 20 Page - NXP Semiconductors

部件名 MMA8652FC
功能描述  MMA8652FC, 3-Axis, 12-bit, Digital Accelerometer
PDF  65 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MMA8652FC 数据表(HTML) 20 Page - NXP Semiconductors

Back Button MMA8652FC Datasheet HTML 16Page - NXP Semiconductors MMA8652FC Datasheet HTML 17Page - NXP Semiconductors MMA8652FC Datasheet HTML 18Page - NXP Semiconductors MMA8652FC Datasheet HTML 19Page - NXP Semiconductors MMA8652FC Datasheet HTML 20Page - NXP Semiconductors MMA8652FC Datasheet HTML 21Page - NXP Semiconductors MMA8652FC Datasheet HTML 22Page - NXP Semiconductors MMA8652FC Datasheet HTML 23Page - NXP Semiconductors MMA8652FC Datasheet HTML 24Page - NXP Semiconductors Next Button
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MMA8652FC
Sensors
20
Freescale Semiconductor, Inc.
Figure 11. Multiple Byte Read timing (I2C)
5.11.3
Single byte write
1.
To start a write command, the Master transmits a start condition (ST) to the MMA8652FC, slave address ($1D) with the
R/W bit set to “0” for a write,
2.
The MMA8652FC sends an acknowledgement.
3.
Next the Master (MCU) transmits the address of the register to write to, and the MMA8652FC sends an
acknowledgement.
4.
Then the Master (or MCU) transmits the 8-bit data to write to the designated register, and the MMA8652FC sends an
acknowledgement that it has received the data. Because this transmission is complete, the Master transmits a stop
condition (SP) to the data transfer. The data sent to the MMA8652FC is now stored in the appropriate register.
Figure 12. Single Byte Write timing (I2C)
5.11.4
Multiple byte write
(See Table 11 for next auto-increment address.)
1.
After a write command is received, the MMA8652FC automatically increments the received register address
commands.
2.
Therefore, after following the steps of a single byte write, multiple bytes of data can be written to sequential registers
after each MMA8652FC acknowledgment (ACK) is received.
Figure 13. Multiple Byte Write timing (I2C)
Master
ST
Device Address[7:1]
W
Register Address[7:0]
SR Device Address[7:1] R
AK
Slave
AK
AK
AK
Data[7:0]
Master
AK
AK
NAK
SP
Slave
Data[7:0]
Data[7:0]
Data[7:0]
Master
ST Device Address[7:1]
W
Register Address[7:0]
Data[7:0]
SP
Slave
AK
AK
AK
Master
ST
Device Address[7:1]
W
Register Address[7:0]
Data[7:0]
Data[7:0]
SP
Slave
AK
AK
AK
AK



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