MMA8652FC datasheet(19/65 Pages) NXP

19 / 65 page

MMA8652FC

Sensors

Freescale Semiconductor, Inc.

The 9th clock pulse following the slave address byte (and each subsequent byte) is the acknowledge (ACK). The

transmitter must release the SDA line during the ACK period. The receiver must then pull the data line low, so that it

remains stable low during the high period of the acknowledge clock period.

A Master may also issue a repeated START during a data transfer. The MMA8652FC expects repeated STARTs to be

used to randomly read from specific registers.

A low-to-high transition on the SDA line while the SCL line is high is defined as a stop condition (STOP). A data transfer

is always terminated by a STOP.

The MMA8652FC's standard slave address is 0011101 or 0x01D.

5.11.1

Single-byte read

The transmission of an 8-bit command begins on the falling edge of SCL. After the eight clock cycles are used to send

the command, note that the data returned is sent with the MSB first after the data is received. Figure 10 shows the

timing diagram for the accelerometer 8-bit I2C read operation.

The Master (or MCU) transmits a start condition (ST) to the MMA8652FC [slave address (0x1D), with the R/W bit set to

“0” for a write], and the MMA8652FC sends an acknowledgement.

Next the Master (or MCU) transmits the address of the register to read, and the MMA8652FC sends an

acknowledgement.

The Master (or MCU) transmits a repeated start condition (SR) and then addresses the MMA8652FC (0x1D), with the

R/W bit set to “1” for a read from the previously selected register.

The Slave then acknowledges and transmits the data from the requested register. The Master does not acknowledge

(NAK) the transmitted data, but transmits a stop condition to end the data transfer.

Figure 10. Single-Byte Read timing (I2C)

NOTE

For the following subsections, use the following legend.

5.11.2

Multiple byte read

(See Table 11 for next auto-increment address.)

When performing a multi-byte read or “burst read”, the MMA8652FC automatically increments the received register

address commands after a read command is received.

After following the steps of a single byte read, multiple bytes of data can be read from sequential registers after each

MMA8652FC acknowledgment (AK) is received,

Until a no acknowledge (NAK) occurs from the Master,

Followed by a stop condition (SP), which signals the end of transmission.

Table 11. I2C Device address sequence

Command

[6:0]

Device address

[6:0]

Device address

R/W

8-bit final

value

Read

0011101

0x1D

0x3B

Write

0011101

0x1D

0x3A

Master

ST Device Address[7:1]

Address[7:0]

SR Device Address[7:1]

NAK

Slave

Data[7:0]

Legend

ST: Start Condition

SP: Stop Condition

NAK: No Acknowledge

W: Write = 0

SR: Repeated Start Condition

AK: Acknowledge

R: Read = 1

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