ADAR2004

Data Sheet

Rev. 0 | Page 8 of 37

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

GND1

2

RFIN2–

3

RFIN2+

4

GND2

5

GND3

6

GND4

7

GND5

8

GND6

9

RFIN3+

10

RFIN3–

11

GND7

12

GND13

LOIN

GND12

VREG

MADV

MRST

RxADV

RxRST

SCLK

SDIO

CS

13 14

15

16

17

18

19

20

21

22

23

24

25

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

NOTES

1. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED

TO A GROUND PLANE WITH LOW THERMAL AND

ELECTRICAL IMPEDANCE.

ADAR2004

TOP VIEW

(Not to Scale)

Figure 6. Pin Configuration (Top View, Not to Scale)

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 13, 38

2.5 V Power Supply for the Analog Section. Connect decoupling capacitors (one 10 nF and one

2, 5 to 9, 12, 14,

17, 18, 23, 34,

36, 37, 39, 44,

45, 48

GND1 to GND18

Ground. Connect all ground pins to a ground plane with low thermal and electrical impedance.

3, 4, 10, 11, 15,

16, 46, 47

RFIN2−, RFIN2+,

RFIN3+, RFIN3−,

RFIN4+, RFIN4−,

RFIN1−, RFIN1+

Differential RF Inputs. RFINx± are 100 Ω differential pairs, ac-coupled internally. The RFINx± pins

operate from 10 GHz to 40 GHz. All eight lines must have equal electrical and mechanical lengths

to ensure consistent performance from channel to channel.

19 to 22, 40 to 43

IFOUT4+, IFOUT4−,

IFOUT3+, IFOUT3−,

IFOUT2−, IFOUT2+,

IFOUT1−, IFOUT1+

Differential IF Outputs. IFOUTx± are 100 Ω differential pairs, dc-coupled internally. The IFOUTx±

electrical and mechanical lengths.

24

SDO

Serial Data Output. Register states can be read back on the SDO line if Register 0x000, Bits[4:3] are

set high.

25

CS

Chip Select Bar. Pull the CS pin low to activate the SPI port. CS is used to activate the SPI port on

the ADAR2004 and is active low. When CS goes high, the data stored in the shift registers is latched.

Connect a 200 kΩ pull-up resistor to 1.8 V to ensure that the SPI is shut off while not in use.

26

SDIO

Serial Data Input and Output. The SDIO pin is a high impedance data input for clocking in information.

The SDIO pin can also be used to read out data if Register 0x000, Bits[4:3] are set low (default).

27

SCLK

Serial Clock. The SCLK pin is used to clock data into and out of the SPI.

28

RxRST

Receive State Machine Reset. If the state machine is enabled, RxRST immediately sets the receiver

state machine back to the configuration in RX_EN_MODE_0, RX_GAIN12_MODE_0, and

RX_GAIN34_MODE_0 (Register 0x040, Register 0x041, and Register 0x042).

29

RxADV

Receive State Machine Advance. If the state machine is enabled, RxADV advances the receiver

state machine to the next state in its cycle. If currently at the end of the cycle, pulsing RxADV

returns the pointer to the mode defined in RX_STATE_1 (Register 0x01A, Bits[7:4]).

30

MRST

Multiplier State Machine Reset. If the state machine is enabled, MRST immediately sets the

multiplier/filter state machine back to the configuration in MULT_EN_MODE_0 (Register 0x070).

31

MADV

Multiplier State Machine Advance. If the state machine is enabled, MADV advances the

multiplier/filter state machine to the next state in its cycle. If currently at the end of the cycle,

pulsing MADV returns the pointer to the mode defined in MULT_STATE_1 (Register 0x022, Bits[7:4]).