ADAR2004ACCZ-R7 datasheet(20/37 Pages) AD

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ADAR2004

Data Sheet

Rev. 0 | Page 20 of 37

same four sequencer lines (MADV, MRST, RxADV, RxRST). See

the Parallel Chip Control section for more information.

Following the mode definitions, the user must fill the state bits

in Register 0x01A to Register 0x021 with the modes of interest.

Any state can point to any mode, except State 0, which always

points to Mode 0. Note that the sequencer moves through the

states in order, up to the state machine depth.

After defining the states, the user must set the number of states

to be used by the sequencer by changing the RX_STATES bits

(Register 0x018, Bits[3:0]). RX_STATES is 0 indexed. Therefore,

setting the depth to 0 leaves RX_STATE_1 as the only state in

the loop.

After the multiplier/filter state machine is programmed and

enabled, operation is controlled by the RxRST and RxADV pins.

Alternatively, operation can be controlled through the SPI using

the RX_RST_SPI and RX_ADV_SPI bits (Register 0x02A,

Bits[1:0]). Note that using the SPI is slower than pulsing the

sequencer pins directly.

RxRST moves the pointer on the receiver state machine to State 0

regardless of the current position of the pointer and can be asserted

at any time. State 0 always refers to Mode 0 and cannot be set to

another mode. However, Mode 0 can be overwritten with any

receiver configuration. Mode 0 is defined in Register 0x040,

RxADV pulses advance the receiver state machine pointer one

state at a time until the defined sequencer depth is cycled through.

At that point, an additional RxADV pulse moves the pointer

back to State 1. State 1 applies the mode defined in the

RX_STATE_1 bits (Register 0x01A, Bits[7:4]).

FREQUENCY SWEEP ALL CHANNELS

Figure 43 shows a method of operation that can be used during

a 20 GHz to 40 GHz frequency sweep of all receive channels. As

described in Table 7, three multiplier/filter states are required

during a 20 GHz to 40 GHz sweep. In this example, the defined

state machine depth, MULT_STATES (Register 0x019, Bits[3:0]),

is 3 because there are four states inside the loop, and

MULT_STATES is 0 indexed.

As shown in Figure 43,

•

Multiplier/Filter State 0 = sleep (outside the loop)

•

Multiplier/Filter State 1 = mid band multiplier ready

•

Multiplier/Filter State 2 = output 20 GHz to 25 GHz to mixers

•

Multiplier/Filter State 3 = output 25 GHz to 30 GHz to mixers

•

Multiplier/Filter State 4 = output 30 GHz to 40 GHz to mixers

The initial state is the sleep state where power consumption is

at a minimum. A pulse on MADV advances the state machine

to the second state, which is defined as a ready state. By partially

powering up the mid band multiplier with its BPF set high, an

additional pulse on MADV makes this subcircuit path active in

under 10 ns. By making use of the ready mode throughout the

sweep, the settling time can be kept under 10 ns.

After the appropriate number of pulses is applied to MADV (4,

in this case), the state machine automatically returns to the

second state (ready mode).

SEQUENCER SLEEP CONTROL

To further simplify the control of the ADAR2004, it is possible

to link the sleep states of the two state machines so that one

sequencer going to sleep forces the other sequencer to sleep as

well. This link helps to limit the total number of required states

to achieve the desired type of operation. To use this feature, one

of the two sleep control bits must be set, but not both.

For example, when the ADAR2004 is configured for a frequency

sweep (as shown in Figure 43), if the RX_SLP_CTRL bit

(Register 0x018, Bit 6) is set, when the multiplier/filter

sequencer is reset, the receiver state machine is forced to sleep as

well. This means that the receiver state machine does not

require a state dedicated to sleep if it only needs to sleep when the

multiplier/filter sleeps. Furthermore, because the

multiplier/filter sleep state is controlling the sleep state of the

receiver, bringing the multiplier/filter out of sleep also brings the

receiver out of sleep. This routine is controlled with either the

SPI or one external line (MADV).

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