ADAR2004

Data Sheet

Rev. 0 | Page 2 of 37

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications ...................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications .................................................................................... 3

Timing Specifications .................................................................. 5

Absolute Maximum Ratings ........................................................... 7

Thermal Resistance ...................................................................... 7

Electrostatic Discharge (ESD) Ratings...................................... 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions ............................ 8

Typical Performance Characteristics........................................... 10

Theory of Operation ...................................................................... 16

Overview...................................................................................... 16

LO Input Buffer, 4× Multiplier, and Band-Pass Filter.......... 16

1:4 Signal Splitter Network ....................................................... 16

Receivers...................................................................................... 17

Temperature Sensor................................................................... 17

ADC and ADC Clock ................................................................ 17

Applications Information ............................................................. 18

SPI Control.................................................................................. 18

State Machine Modes vs. States................................................ 18

State Machine Setup .................................................................. 18

Multiplier/Filter State Machine................................................ 19

Receiver State Machine ............................................................. 19

Frequency Sweep All Channels................................................ 20

Sequencer Sleep Control ........................................................... 20

Sequencer Sleep Hold................................................................ 21

Sequencer Control Latch Bypass.............................................. 21

Parallel Chip Control................................................................. 22

Multichip Frequency Sweep ..................................................... 22

Bias Points and Voltages ............................................................... 24

Register Summary .......................................................................... 25

Outline Dimensions....................................................................... 37

Ordering Guide .......................................................................... 37

REVISION HISTORY

8/2020—Revision 0: Initial Version