STM32L552CET6PTR datasheet(48/340 Pages) STMICROELECTRONICS

48 / 340 page

Functional overview

STM32L552xx

48/340

DS12737 Rev 6

supercapacitor is present. The VBAT pin supplies the RTC with LSE and the backup

registers. Three anti-tamper detection pins are available in VBAT mode.

The VBAT operation is automatically activated when VDD is not present. An internal VBAT

battery charging circuit is embedded and can be activated when VDD is present.

Note:

When the microcontroller is supplied from VBAT, neither external interrupts nor RTC

alarm/events exit the microcontroller from the VBAT operation.

3.9.8

PWR TrustZone security

When the TrustZone security is activated by the TZEN option bit, the PWR is switched in

TrustZone security mode.

The PWR TrustZone security allows to secure the following configuration:

•

Low-power mode

•

Wake-up (WKUP) pins

•

Voltage detection and monitoring

•

VBAT mode

Other PWR configuration bits are secure when:

•

The system clock selection is secure in RCC, the voltage scaling (VOS) configuration is

secure

•

A GPIO is configured as secure, it's corresponding bit for Pull-up/Pull-down in standby

mode is secure

•

The RTC is secure, the backup domain write protection bit in PWR is secure.

3.10

Peripheral interconnect matrix

Several peripherals have direct connections between them, which allow autonomous

communication between them and support the saving of CPU resources (thus power supply

consumption). In addition, these hardware connections allow fast and predictable latency.

Depending on the peripherals, these interconnections can operate in Run, Sleep, Low-

power run and Sleep, Stop 0, Stop 1 and Stop 2 modes. See Table 12 for more details.

Table 12. STM32L552xx peripherals interconnect matrix

Interconnect source

Interconnect

destination

Interconnect action

TIMx

Timers synchronization or chaining

ADC

DAC1

DFSDM1

Conversion triggers

DMA

Memory to memory transfer trigger

COMPx

Comparator output blanking

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