STM32L552CET6PTR datasheet(37/340 Pages) STMICROELECTRONICS

37 / 340 page

DS12737 Rev 6

37/340

STM32L552xx

Functional overview

Figure 5. Power-up/down sequence

1. VDDX refers to any power supply among VDDA, VDDIO2 and VDDUSB.

3.9.2

Power supply supervisor

The devices have an integrated ultra-low-power Brownout reset (BOR) active in all modes

(except for Shutdown mode). The BOR ensures proper operation of the devices after power-

on and during power down. The devices remain in reset mode when the monitored supply

voltage VDD is below a specified threshold, without the need for an external reset circuit.

The lowest BOR level is 1.71 V at power on, and other higher thresholds can be selected

through option bytes.The devices feature an embedded programmable voltage detector

(PVD) that monitors the VDD power supply and compares it to the VPVD threshold.

An interrupt can be generated when VDD drops below the VPVD threshold and/or when VDD

is higher than the VPVD threshold. The interrupt service routine can then generate a

warning message and/or put the MCU into a safe state. The PVD is enabled by software.

In addition, the devices embed a peripheral voltage monitor which compares the

independent supply voltages VDDA, VDDUSB, VDDIO2 with a fixed threshold in order to ensure

that the peripheral is in its functional supply range.

3.9.3

Voltage regulator

Two embedded linear voltage regulators supply most of the digital circuitries: the main

regulator (MR) and the low-power regulator (LPR).

•

The MR is used in the Run and Sleep modes and in the Stop 0 mode.

•

The LPR is used in Low-power run, Low-power sleep, Stop 1 and Stop 2 modes. It is

also used to supply the 64 Kbytes or only 4 Kbytes of SRAM2 in standby with SRAM2

retention.

•

Both regulators are in power-down while they are in standby and Shutdown modes: the

regulator output is in high impedance, and the kernel circuitry is powered down thus

inducing zero consumption.

MSv47490V1

0.3

VBOR0

3.6

Operating mode

Power-on

Power-down

time

VDDX

(1)

VDD

Invalid supply area

VDDX < VDD + 300 mV

VDDX independent from VDD

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