STM32L552CET6PTR datasheet(33/340 Pages) STMICROELECTRONICS

33 / 340 page

DS12737 Rev 6

33/340

STM32L552xx

Functional overview

•

VDDSMPS = 1.71 V to 3.6 V

VDDSMPS is the external power supply for the SMPS step down converter. It is

provided externally through VDDSMPS supply pin, and shall be connected to the same

supply as VDD.

•

VLXSMPS is the switched SMPS step down converter output.

•

V15SMPS are the power supply for the system regulator. It is provided externally

through the SMPS step down converter VLXSMPS output.

Note:

The SMPS power supply pins are available only on a specific package with SMPS step

down converter option.

•

VDD12 = 1.05 to 1.32 V

VDD12 is the external power supply bypassing the internal regulator when connected

to an external SMPS. It is provided externally through VDD12 pins and only available

on packages with the external SMPS supply option. VDD12 does not require any

external decoupling capacitance and cannot support any external load.

•

VDDUSB = 3.0 V to 3.6 V

VDDUSB is the external independent power supply for USB transceivers. The

VDDUSB voltage level is independent from the VDD voltage and should preferably be

connected to VDD when the USB is not used.

•

VDDIO2 = 1.08 V to 3.6 V

•

VDDIO2 is the external power supply for 14 I/Os (port G[15:2]). The VDDIO2 voltage

level is independent from the VDD voltage and should preferably be connected to VDD

when PG[15:2] are not used.

•

VBAT = 1.55 V to 3.6 V

VBAT is the power supply for RTC, external clock 32 kHz oscillator and backup registers

(through power switch) when VDD is not present.

•

VREF-, VREF+

VREF+ is the input reference voltage for ADCs and DACs. It is also the output of the

internal voltage reference buffer when enabled.

When VDDA < 2 V VREF+ must be equal to VDDA.

When VDDA ≥ 2 V VREF+ must be between 2 V and VDDA.

VREF+ can be grounded when ADC and DAC are not active.

The internal voltage reference buffer supports two output voltages, which are

configured with VRS bit in the VREFBUF_CSR register:

–VREF+ around 2.048 V. This requires VDDA equal to or higher than 2.4 V.

–VREF+ around 2.5 V. This requires VDDA equal to or higher than 2.8 V.

VREF- and VREF+ pins are not available on all packages. When not available, they are

bonded to VSSA and VDDA, respectively.

When the VREF+ is double-bonded with VDDA in a package, the internal voltage

reference buffer is not available and must be kept disabled (refer to datasheet for

packages pinout description).

VREF- must always be equal to VSSA.

An embedded linear voltage-regulator is used to supply the internal digital power VCORE.

VCORE is the power supply for digital peripherals, SRAM1 and SRAM2. The Flash is

supplied by VCORE and VDD.

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