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STM32L552CET6PTR 数据表(PDF) 53 Page - STMicroelectronics |
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STM32L552CET6PTR 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 340 page ![]() DS12737 Rev 6 53/340 STM32L552xx Functional overview 78 TrustZone security When the TrustZone security is activated by the TZEN option bit, the RCC is switched in TrustZone security mode. The RCC TrustZone security allows to secure some RCC system configuration and peripheral configuration clock from being read or modified by non-secure accesses: • RCC system security: – HSE, HSE-CSS, HSI, MSI, LSI, LSE, LSE-CSS, HSI48 configuration and status bits – Main PLL, PLLSAI1, PLLSAI2, AHB prescaler configuration and status bits – System clock SYSCLK and HSI48 source clock selection and status bits – MCO clock output configuration and STOPWUCK bit – Reset flag RMVF configuration bit • RCC peripheral security: – When a peripheral is secure, the related peripheral clock, reset, clock source selection and clock enable during low power modes control bits are secure. • A peripheral is in secure state when: – For securable peripherals, when it's corresponding SEC security bit is set in the TZSC (TrustZone security controller) – For TrustZone-aware peripherals, a security feature of this peripheral is enabled through its dedicated bits. 3.12 Clock recovery system (CRS) The devices embed a special block which allows automatic trimming of the internal 48 MHz oscillator to guarantee its optimal accuracy over the whole device operational range. This automatic trimming is based on the external synchronization signal, which could be either derived from USB SOF signalization, from LSE oscillator, from an external signal on CRS_SYNC pin or generated by user software. For faster lock-in during startup it is also possible to combine automatic trimming with manual trimming action. 3.13 General-purpose inputs/outputs (GPIOs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. After reset, all GPIOs are in Analog mode to reduce power consumption. The I/Os alternate function configuration can be locked if needed following a specific sequence in order to avoid spurious writing to the I/Os registers. GPIO TrustZone security Each I/O pin of GPIO port can be individually configured as secure. When the selected I/O pin is configured as secure, its corresponding configuration bits for alternate function, mode selection, I/O data are secure against a non-secure access. The associated registers bit access is restricted to a secure software only. After reset, all GPIO ports are secure. |
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