STM32L552CET6PTR datasheet(59/340 Pages) STMICROELECTRONICS

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DS12737 Rev 6

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STM32L552xx

Functional overview

The main features of the FSMC controller are the following:

•

Interface with static-memory mapped devices including:

–

Static random access memory (SRAM)

–

NOR Flash memory/OneNAND Flash memory

–

PSRAM (four memory banks)

–

NAND Flash memory with ECC hardware to check up to 8 Kbytes of data

–

Ferroelectric RAM (FRAM)

•

8-,16- bit data bus width

•

Independent chip select control for each memory bank

•

Independent configuration for each memory bank

•

Write FIFO

LCD parallel interface

The FMC can be configured to interface seamlessly with most graphic LCD controllers. It

supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to

specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost

effective graphic applications using LCD modules with embedded controllers or high-

performance solutions using external controllers with dedicated acceleration.

TrustZone security

When the TrustZone security is enabled, the whole FSMC banks are secure after reset.

Non-secure area can be configured using the TZSC MPCWMx controller.

•

The FSMC NOR/PSRAM bank:

–

Up to two non-secure area can be configured thought the TZSC MPCWM2

controller with a granularity of 64 Kbytes.

•

The FSMC NAND bank:

–

Can be either configured as fully secure or fully non-secure using the TZSC

MPCWM3 controller.

The FSMC registers can be configured as secure through the TZSC controller.

3.20

Octo-SPI interface (OCTOSPI)

The OCTOSPI is a specialized communication interface targetting single, dual, quad or octal

SPI memories. It can operate in any of the three following modes:

•

Indirect mode: all the operations are performed using the OCTOSPI registers

•

Status polling mode: the external memory status register is periodically read and an

interrupt can be generated in case of flag setting

•

Memory-mapped mode: the external memory is memory mapped and is seen by the

system as if it were an internal memory supporting read and write operation

The OCTOSPI supports two frame formats:

•

Classical frame format with command, address, alternate byte, dummy cycles and data

phase over 1, 2, 4 or 8 data pins

•

HyperBusTM frame format

The OCTOSPI offers the following features:

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