STM32L552CET6PTR datasheet(7/340 Pages) STMICROELECTRONICS

7 / 340 page

DS12737 Rev 6

7/340

STM32L552xx

List of tables

Table 1.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Table 2.

STM32L552xx features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 3.

Boot modes when TrustZone is disabled (TZEN=0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 4.

Boot modes when TrustZone is enabled (TZEN=1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 5.

Boot space versus RDP protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 6.

Example of memory map security attribution vs SAU configuration regions . . . . . . . . . . . 27

Table 7.

Securable peripherals by TZSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 8.

TrustZone-aware peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 9.

SMPS external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Table 10.

STM32L552xx modes overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Table 11.

Functionalities depending on the working mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Table 12.

STM32L552xx peripherals interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Table 13.

DMA1 and DMA2 implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Table 14.

Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Table 15.

Internal voltage reference calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Table 16.

Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Table 17.

I2C implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Table 18.

USART/UART/LPUART features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Table 19.

SAI implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Table 20.

Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Table 21.

STM32L552xx pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Table 22.

Alternate function AF0 to AF7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

Table 23.

Alternate function AF8 to AF15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

Table 24.

Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

Table 25.

Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

Table 26.

Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

Table 27.

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

Table 28.

SMPS modes summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

Table 29.

SMPS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

Table 30.

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

Table 31.

Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 148

Table 32.

Embedded internal voltage reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150

Table 33.

Current consumption in Run and Low-power run modes, code with data processing

running from Flash in single Bank, ICACHE ON in 2-way . . . . . . . . . . . . . . . . . . . . . . . . 153

Table 34.

Current consumption in Run and Low-power run modes, code with data processing

running from Flash in single Bank, ICACHE ON in 1-way . . . . . . . . . . . . . . . . . . . . . . . . 154

Table 35.

Current consumption in Run and Low-power run modes, code with data processing

running from Flash in single Bank, ICACHE disabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . 155

Table 36.

Current consumption in Run mode, code with data processing

running from Flash in single bank, ICACHE ON in 2-way and power

supplied by internal SMPS step down converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156

Table 37.

Current consumption in Run mode, code with data processing

running from Flash in single bank, ICACHE ON in 1-way and power

supplied by internal SMPS step down converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

Table 38.

Current consumption in Run mode, code with data processing

running from Flash in single bank, ICACHE disabled and power

supplied by internal SMPS step down converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Table 39.

Current consumption in Run and Low-power run modes, code with data processing

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