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ADRF6750ACPZ-R7 数据表(PDF) 28 Page - Analog Devices

部件名 ADRF6750ACPZ-R7
功能描述  950 MHz to 1575 MHz Quadrature Modulator with Integrated Fractional-N PLL and VCO
PDF  40 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF6750ACPZ-R7 数据表(HTML) 28 Page - Analog Devices

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ADRF6750
Rev. A | Page 28 of
40
REGISTER BIT DESCRIPTIONS
Table 7. Register CR0 (Address 0x00), Fractional Word 4
Bit
Description1
7
Fractional Word F7
6
Fractional Word F6
5
Fractional Word F5
4
Fractional Word F4
3
Fractional Word F3
2
Fractional Word F2
1
Fractional Word F1
0
Fractional Word F0 (LSB)
1 Double-buffered. Loaded on the write to Register CR0.
Table 8. Register CR1 (Address 0x01), Fractional Word 3
Bit
Description1
7
Fractional Word F15
6
Fractional Word F14
5
Fractional Word F13
4
Fractional Word F12
3
Fractional Word F11
2
Fractional Word F10
1
Fractional Word F9
0
Fractional Word F8
1 Double-buffered. Loaded on the write to Register CR0.
Table 9. Register CR2 (Address 0x02), Fractional Word 2
Bit
Description1
7
Fractional Word F23
6
Fractional Word F22
5
Fractional Word F21
4
Fractional Word F20
3
Fractional Word F19
2
Fractional Word F18
1
Fractional Word F17
0
Fractional Word F16
1 Double-buffered. Loaded on the write to Register CR0.
Table 10. Register CR3 (Address 0x03), Fractional Word 1
Bit
Description
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Fractional Word F24 (MSB)1
1 Double-buffered. Loaded on the write to Register CR0.
Table 11. Register CR5 (Address 0x05), 5-Bit Reference
Divider Enable
Bit
Description
7
Reserved
6
Reserved
5
Reserved
4
5-bit R-divider enable1
0 = disable 5-bit R-divider (default)
1 = enable 5-bit R-divider
3
Reserved
2
Reserved
1
Reserved
0
Reserved
1 Double-buffered. Loaded on the write to Register CR0.
Table 12. Register CR6 (Address 0x06), Integer Word 2
Bit
Description1
7
Integer Word N7
6
Integer Word N6
5
Integer Word N5
4
Integer Word N4
3
Integer Word N3
2
Integer Word N2
1
Integer Word N1
0
Integer Word N0
1 Double-buffered. Loaded on the write to Register CR0.
Table 13. Register CR7 (Address 0x07), Integer Word 1 and
Muxout Control
Bit
Description
[7:4]
Muxout control
0000 = tristate
0001 = logic high
0010 = logic low
1101 = RCLK/2
1110 = NCLK/2
3
Integer Word N111
2
Integer Word N101
1
Integer Word N91
0
Integer Word N81
1 Double-buffered. Loaded on the write to Register CR0.



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