DVR datasheet(228/416 Pages) MICROCHIP

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PIC24FJ256GA705 FAMILY

DS30010118D-page 228

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bit 3

S: I2Cx Start bit

Updated when Start, Reset or Stop is detected; cleared when the I2C module is disabled, I2CEN = 0.

1 = Indicates that a Start (or Repeated Start) bit has been detected last

0 = Start (or Repeated Start) bit was not detected last

bit 2

R/W: Read/Write Information bit (when operating as I2C slave)

1 = Read: Indicates the data transfer is output from the slave

0 = Write: Indicates the data transfer is input to the slave

bit 1

RBF: Receive Buffer Full Status bit

1 = Receive is complete, I2CxRCV is full

0 = Receive is not complete, I2CxRCV is empty

bit 0

TBF: Transmit Buffer Full Status bit

1 = Transmit is in progress, I2CxTRN is full (8-bits of data)

0 = Transmit is complete, I2CxTRN is empty

I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)

I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER

U-0

R/W-0

—

MSK<9:8>

bit 15

bit 8

R/W-0

MSK<7:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-10

Unimplemented: Read as ‘0’

bit 9-0

MSK<9:0>: I2Cx Mask for Address Bit x Select bits

1 = Enables masking for bit x of the incoming message address; bit match is not required in this position

0 = Disables masking for bit x; bit match is required in this position

DVR 数据表(PDF) 228 Page - Microchip Technology

DVR 数据表(HTML) 228 Page - Microchip Technology

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